Memory Cell Area Control for Selective Error Correction Timing

Solution Overview

Problem

As semiconductor devices increase data transmission speed, the probability of errors during data transmission also rises, necessitating effective error correction mechanisms to ensure reliability, but existing solutions may not adequately manage error correction operations across multiple cell areas efficiently.

Innovation Solution

The electronic device incorporates an area control signal generation circuit and an operation control circuit to determine whether each cell area performs an error correction operation, controlling column operations, refresh cycle times, and voltage levels, thereby optimizing error correction processes across multiple cell areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data transmission speed is increased in semiconductor devices, then operation speed is improved, but the probability of errors during data transmission increases

Engineering Contradiction:

Improveoperation speedVSAvoiddata transmission reliability

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The memory device is divided into multiple cell areas, and error correction operations are selectively applied to specific areas based on error detection. This segmentation allows the system to maintain high-speed operation across all areas while applying error correction only where needed, thus preserving overall speed while improving reliability in error-prone regions.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different cell areas are treated differently based on their error characteristics. The area control signal generation circuit identifies which specific areas require error correction and applies correction operations only to those areas, rather than uniformly across the entire memory device. This local quality approach maintains high-speed operation in error-free areas while ensuring reliability in areas where errors occur.

Inventive Principle:

Principle #3Local quality

2Reliability

If error correction operations are performed in all cell areas, then data transmission reliability is improved, but power consumption and operational efficiency deteriorate

Engineering Contradiction:

Improvedata transmission reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory device is divided into multiple cell areas, and error correction operations are selectively applied to specific areas based on error detection. This segmentation allows the system to maintain high-speed operation across all areas while applying error correction only where needed, thus preserving overall speed while improving reliability in error-prone regions.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Instead of applying error correction operations to all cell areas (excessive action), the system applies error correction only to the specific areas where errors are detected (partial action). The area control signal generation circuit identifies error-prone areas and restricts error correction operations to those areas only, reducing unnecessary power consumption in error-free areas while maintaining reliability where needed.

Inventive Principle:

Principle #16Partial or excessive action

3Reliability

If error correction operations are performed in all cell areas, then data transmission reliability is improved, but operational efficiency deteriorates due to uniform processing

Engineering Contradiction:

Improvedata transmission reliabilityVSAvoidoperational efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The memory device is divided into multiple cell areas, and error correction operations are selectively applied to specific areas based on error detection. This segmentation allows the system to maintain high-speed operation across all areas while applying error correction only where needed, thus preserving overall speed while improving reliability in error-prone regions.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Instead of applying error correction operations to all cell areas (excessive action), the system applies error correction only to the specific areas where errors are detected (partial action). The area control signal generation circuit identifies error-prone areas and restricts error correction operations to those areas only, reducing unnecessary power consumption in error-free areas while maintaining reliability where needed.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS10621039B2Electronic devices

Publication Date: 2020.04.14 SK HYNIX INC

AI summary

An electronic device includes an area control signal generation circuit and an area column control signal generation circuit. The area control signal generation circuit generates an area control signal in response to an operation control signal and an internal information signal. The area control signal includes information on whether each of a plurality of cell areas performs an error correction operation. The area column control signal generation circuit delays a column pulse signal for a delay period, which is determined according to the area control signal, to generate an area column control signal that controls a column operation of the plurality of cell areas.