Dynamic Memory Allocation with Randomized Arena Address Shifting

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Solution Overview

Problem

Existing dynamic memory allocators face challenges in achieving full Address Space Layout Randomization (ASLR) without adding overhead, while maintaining compatibility with prior allocators and ensuring high speed and low complexity, especially due to metadata alignment policies that reduce ASLR entropy.

Innovation Solution

A dynamic memory allocation method that creates arenas with n-byte aligned addresses, shifts the arena addresses by a stored random variable upon creation, and retrieves memory block addresses using arithmetic operations to maintain randomization and entropy, ensuring compatibility and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If metadata alignment policies are used to simplify memory management, then device complexity is reduced, but ASLR entropy is reduced

Engineering Contradiction:
Improvememory management complexityVSAvoidASLR entropy
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent segments the memory management system into multiple independent arenas, each with its own metadata structures. This allows ASLR to be applied at the arena level while maintaining alignment within each arena, thus preserving entropy while simplifying management through modular structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an additional dimension of randomization by applying ASLR at the arena level rather than only at the process level. This multi-level approach (process-level + arena-level randomization) increases overall entropy while maintaining alignment policies within each arena for simplified management.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple arenas are used to increase memory capacity, then quantity of substance increases, but device complexity increases

Engineering Contradiction:
Improvememory capacityVSAvoidallocator complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements a universal arena management system where multiple arenas share common metadata structures and management routines. Each arena can be independently allocated and deallocated, but they all use the same underlying data structures and algorithms, reducing complexity through reusability and standardization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent nests multiple arenas within a unified allocator framework, where each arena contains its own memory blocks but all arenas are managed by a single allocator instance. This hierarchical organization allows the system to scale memory capacity while maintaining a consistent management interface.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Ease of operation

If alignment policies are applied to arena addresses, then ease of operation improves, but ASLR entropy is reduced

Engineering Contradiction:
Improvearena access simplicityVSAvoidaddress randomization entropy
Core Design Contradiction:
Ease of operationVSLoss of information

Solution Approach 1:

The patent applies alignment policies locally within each arena rather than globally across all memory. Each arena maintains its own alignment characteristics for efficient access, while the arenas themselves are randomly positioned at the process level, thus preserving both ease of operation and ASLR entropy through localized optimization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11886332B2Dynamic memory allocation methods and systems
Publication Date: 2024.01.30 CYBER INTELLIGENCE SL
  • US11886332B2 patent drawing
  • US11886332B2 patent drawing
  • US11886332B2 patent drawing

AI summary

In a dynamic memory allocator, a method of allocating memory to a process, the method comprising executing on a processor the steps of: creating one or more arenas within the memory, each arena comprising one or more memory blocks and each arena having an n-byte aligned arena address; upon receiving a memory request from the process, returning a pointer to the process, the pointer having as its value an address of a memory block selected from one of the arenas; upon determining that the memory block is no longer needed by the process, retrieving the address of said memory block from the pointer and releasing the memory block; and, upon a new arena being created, shifting forward the n-byte aligned address of said new arena according to a stored variable such that each memory block of said new arena is also shifted by the stored variable, the stored variable having n bytes and the stored variable having a random value.