3D Memory Array Stack Using Carbon Nitride Tiers to Limit Seams

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Solution Overview

Problem

Existing methods for forming memory arrays with vertically-stacked memory cells face challenges in efficiently removing sacrificial materials and forming conductive structures, leading to potential seam formation and material etch protection issues.

Innovation Solution

The use of carbon and nitrogen-containing materials, such as carbon-doped silicon nitride, in the stack tiers provides enhanced etch resistance and allows for thinner layers, reducing seam formation and improving material protection during the manufacturing process, enabling efficient formation of conductive tiers and wordlines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional sacrificial materials are used in vertically-stacked memory cell structures, then the sacrificial material can be removed through etching, but seam formation occurs and material protection is insufficient

Engineering Contradiction:

Improveseam formationVSAvoidmaterial protection

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The patent uses carbon-doped silicon nitride as a composite sacrificial material that combines the etchability of silicon nitride with the protective properties of carbon. This composite material prevents seam formation during etching while maintaining adequate material protection, resolving the contradiction between manufacturing precision and reliability.

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The patent modifies the chemical composition parameters of the sacrificial material by doping silicon nitride with carbon. This parameter change enhances the material's properties to simultaneously achieve better etch resistance (reducing seams) and sufficient protection during the manufacturing process.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If thicker sacrificial material layers are used to improve protection, then material protection improves, but seam formation increases and processing complexity increases

Engineering Contradiction:

Improvematerial protectionVSAvoidseam formation

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

By using carbon-doped silicon nitride, the patent achieves adequate material protection with thinner layers compared to conventional sacrificial materials. The carbon component enhances etch resistance, preventing seam formation even when layer thickness is reduced, thus resolving the contradiction between protection and seam formation.

Inventive Principle:

Principle #40Composite materials

3Loss of substance

If multiple etching steps are used to remove sacrificial material completely, then complete removal is achieved, but processing time and complexity increase

Engineering Contradiction:

Improvesacrificial material removalVSAvoidprocessing time

Core Design Contradiction:

Loss of substanceVSLoss of time

Solution Approach 1:

The patent changes the chemical composition of the sacrificial material to carbon-doped silicon nitride, which has enhanced etchability. This allows complete removal of the sacrificial material through fewer etching steps, reducing processing time while ensuring complete removal to prevent defects.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the manufacturing process by reducing seam formation and improving material protection, resulting in a more reliable and efficient memory array structure with improved etch resistance and reduced overall stack height.

Implementation Method 1

The use of carbon and nitrogen-containing materials, such as carbon-doped silicon nitride, in the stack tiers provides enhanced etch resistance

Methodology Applied

Scientific EffectEtch resistance:

Data Source

PatentUS12432924B2Integrated circuitry and method used in forming a memory array comprising strings of memory cells

Publication Date: 2025.09.30 MICRON TECHNOLOGY INC

AI summary

Integrated circuitry comprising a memory array comprises strings of memory cells comprising laterally-spaced memory blocks that individually comprise a first vertical stack comprising alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The conductive tiers individually comprise a horizontally-elongated conductive line. A second vertical stack is aside the first vertical stack. The second vertical stack comprises an upper portion and a lower portion. The upper portion comprises alternating first insulating tiers and second insulating tiers. The lower portion comprises a lowest insulator tier directly above conductor material of a conductor tier. The lowest insulator tier comprises solid carbon and nitrogen-containing material. An immediately-adjacent tier is directly above the solid carbon and nitrogen-containing material of the lowest insulator tier. The immediately-adjacent tier comprises material that is of different composition from that of the lowest insulator tier. Other embodiments, including methods, are disclosed.