Memory Array Control Inhibitor for Selective Command Blocking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory banks incur significant power costs due to the transmission of control signals and the continuous operation of components, regardless of whether the command is intended for all memory arrays within the bank.
Innovation Solution
Implementing an array control inhibitor that selectively inhibits command transmission and power supply to specific memory arrays based on inhibit commands, using array inhibiting pins to block command signals and power buses, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If control signals are transmitted to all memory arrays in a bank, then all arrays can be operated, but power consumption increases
Solution Approach 1:
The memory bank is segmented into multiple independently controllable memory arrays, each with its own array control inhibitor. This allows selective operation of individual arrays based on command targeting, reducing power consumption by keeping non-targeted arrays in an inhibited state while maintaining the capability to operate any array when needed.
2Reliability
If command signals are propagated to all memory arrays, then comprehensive command coverage is achieved, but unnecessary power consumption occurs
Solution Approach 1:
An array control inhibitor circuit is introduced as an intermediary between the command signal source and the memory arrays. This intermediary selectively blocks command signals from reaching non-targeted arrays while allowing them to pass to targeted arrays, ensuring reliable command delivery to the intended arrays without wasting energy on unnecessary propagation to all arrays.
3Speed
If memory arrays remain powered continuously, then immediate operation is possible, but static power consumption increases
Solution Approach 1:
The array control inhibitor dynamically adjusts the operational state of memory arrays based on command targeting. When an array is not the target of a command, the inhibitor quickly transitions it to a low-power inhibited state. When a command is targeted at an array, the inhibitor rapidly activates it, providing fast response time without requiring continuous full-power operation of all arrays.
4Adaptability or versatility
If control circuitry operates continuously, then full functionality is maintained, but power costs increase
Solution Approach 1:
The array control inhibitor extracts and isolates the power control function for each memory array from the main control circuitry. By placing individual inhibitors at the interface between control signals and each array, the system can selectively power down control circuitry associated with non-targeted arrays while maintaining full control functionality for targeted arrays, reducing overall control circuitry power consumption.
Data Source
AI summary
Systems and method are provided for operating a multi-array memory that includes a left memory array and a right memory array of a memory bank. A command is received at memory input pins. A signal representative of the command is propagated to an array control inhibitor. An array inhibit command is received on one or more other pins of the memory and provided to the array control inhibitor. The array control inhibitor is used to prevent arrival of the command to one of the left memory array and the right memory array based on the array inhibit command.