Memory Array Structural Integrity via Localized Dielectric Fill
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Solution Overview
Problem
The integration of organic spin-on dielectric material in the periphery region of a memory device during fabrication leads to issues such as high dry etch rate, dry strip rate, rip-outs, inadequate adhesion, and defects in interconnects, compromising the structural integrity and reliability of the memory array.
Innovation Solution
A technique where a first fill layer of organic spin-on dielectric material is deposited between wordlines in the memory region, and a second fill layer, typically an inorganic dielectric material, is used in the periphery region to provide structural integrity, while avoiding the periphery region with the organic material to mitigate integration issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If organic spin-on dielectric material is deposited in the periphery region, then structural integrity is provided, but high dry etch rate, dry strip rate, rip-outs, inadequate adhesion, and defects occur
Solution Approach 1:
The patent applies different fill materials to different regions of the die: organic spin-on dielectric material is used in the memory region where it provides appropriate structural integrity, while inorganic dielectric material is used in the periphery region where it provides structural support without causing adhesion issues, etch rate problems, or defects. This spatial differentiation of material properties resolves the contradiction between providing structural integrity and avoiding fabrication defects.
2Strength
If organic spin-on dielectric material is used to fill gaps between wordlines, then structural integrity is provided, but adhesion problems and interconnect defects occur
Solution Approach 1:
The patent restricts organic spin-on dielectric material to the memory region where it is needed for structural integrity between wordlines, while using inorganic dielectric material in the periphery region. This local differentiation ensures that the organic material is only present where it provides benefit without causing adhesion problems or interconnect defects in other regions.
Solution Approach 2:
The patent extracts the organic spin-on dielectric material from the periphery region, keeping it only in the memory region. This removal of the problematic material from areas where it causes adhesion issues and defects resolves the contradiction while maintaining its structural benefits in the memory region.
3Strength
If organic spin-on dielectric material is deposited across the entire die, then structural integrity is provided, but dry etch rate and dry strip rate increase
Solution Approach 1:
The patent limits organic spin-on dielectric material deposition to only the memory region rather than the entire die. This localized application maintains structural integrity where needed while avoiding the increased dry etch rate and dry strip rate that would result from having organic material across the whole die, thereby improving fabrication process efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the structural integrity of the memory array by preventing unwanted voids and reliability issues associated with organic spin-on dielectric material in the periphery region, improving the fabrication process and reducing defects in the memory device.
Implementation Method 1
a first fill layer is deposited between adjacent wordlines of the plurality of wordlines in the memory region
Data Source
AI summary
Embodiments of the present disclosure are directed towards techniques to provide structural integrity for a memory device comprising a memory array. In one embodiment, the device may comprise a memory array having at least a plurality of wordlines disposed in a memory region of a die, and a first fill layer deposited between adjacent wordlines of the plurality of wordlines in the memory region, to provide structural integrity for the memory array. At least a portion of a periphery region of the die adjacent to the memory region may be substantially filled with a second fill layer that is different than the first fill layer. Other embodiments may be described and/or claimed.