Memory Array Dummy Wiring Layout for Uniform Pattern Density

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor storage devices face challenges in maintaining uniform pattern density and accuracy during manufacturing, leading to processing defects and inefficiencies due to variations in wiring widths and layouts.

Innovation Solution

The semiconductor storage device incorporates a region with dummy wirings and memory cells arranged in a specific pattern to maintain uniformity and density, using a manufacturing method that forms uniform line-and-space patterns and avoids gaps, ensuring accurate patterning and reducing defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional wiring layouts are used without dummy wirings, then device complexity is reduced, but manufacturing precision deteriorates due to non-uniform pattern density

Engineering Contradiction:
Improvepattern density uniformityVSAvoidwiring layout complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies the copying principle by creating dummy wirings that replicate the structure and dimensions of actual wirings. These dummy wirings are placed in peripheral regions to copy the pattern characteristics of functional wirings, thereby maintaining uniform pattern density across the entire substrate without adding complex functional elements.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent employs parameter changes by systematically varying the dimensions, spacing, and distribution of dummy wirings to optimize pattern density uniformity. The width, length, and arrangement of dummy wirings are adjusted as parameters to match the density characteristics of actual wiring regions, resolving the contradiction between simplicity and manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If photolithography is performed without uniform pattern density control, then manufacturing time is reduced, but measurement precision deteriorates due to patterning inaccuracies

Engineering Contradiction:
Improvepatterning accuracyVSAvoidphotolithography time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-configuring dummy wirings in the layout design stage to establish uniform pattern density before photolithography processing. This preliminary structural preparation ensures that the photolithography process operates under optimal density conditions, improving patterning accuracy without requiring additional processing time during manufacturing.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If wiring widths vary in different regions, then adaptability to different circuit requirements is improved, but manufacturing precision deteriorates

Engineering Contradiction:
Improvewiring width uniformityVSAvoidcircuit design flexibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by creating distinct wiring regions with different characteristics - actual wirings in functional areas with specific width variations for circuit requirements, and dummy wirings in peripheral areas with standardized dimensions for manufacturing uniformity. This allows local adaptation where needed while maintaining global manufacturing precision.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11856880B2Semiconductor storage device
Publication Date: 2023.12.26 KIOXIA CORP
  • US11856880B2 patent drawing
  • US11856880B2 patent drawing
  • US11856880B2 patent drawing

AI summary

A semiconductor storage device includes a first region, a second region, and a third region. The first region includes first wirings extending in a first direction, second wirings extending in a second direction, and a memory cells provided at intersections of the first and second wirings. The second region includes a contact extending in a third direction. The third region includes first dummy wirings extending in the first direction, and a second dummy wirings extending in the second direction. A width in the first direction of a first one of the second dummy wirings, closest to the first region or the second region in the first direction, is equal to or less than a width in the first direction of a second one of the second dummy wirings next closest to the first region or the second region in the first direction.