Memory Cell Array Edge Isolation via Dielectric Dummy Structures

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Solution Overview

Problem

In cross-point memory arrays, the challenge lies in implementing electrically inactive dummy material portions to reduce edge array effects and morphological defects during patterning, as external dummy materials can reintroduce electrical activity and iso-loading effects, complicating the formation of reliable memory cell arrays.

Innovation Solution

The formation of memory cell arrays includes patterning active and dummy material stacks, isolating dummy material portions using dielectric layers and sacrificial materials to prevent electrical connectivity, thereby maintaining the array's integrity and reducing edge effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dummy material portions are added to reduce edge array effects, then manufacturing precision is improved, but device complexity increases due to the need for isolation structures

Engineering Contradiction:

Improveedge array effects reductionVSAvoidisolation structure complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

A dielectric material is introduced as an intermediary substance between the dummy material portions and the active memory cell stack structures. This dielectric layer electrically isolates the dummy portions from the active cells, preventing electrical interference while maintaining the morphological benefits of the dummy structures during patterning processes.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory cell array is segmented into distinct regions: active memory cell stack structures and electrically isolated dummy material portions. This segmentation allows the dummy portions to serve their morphological stabilization function at array edges without electrically interfering with active cells, resolving the contradiction between improving manufacturing precision and managing device complexity.

Inventive Principle:

Principle #1Segmentation

2Manufacturing precision

If dummy material portions are used to stabilize patterning, then manufacturing precision is improved, but electrical reliability deteriorates due to potential electrical connectivity

Engineering Contradiction:

Improvepatterning stabilityVSAvoidelectrical reliability

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The dielectric material serves as an electrical intermediary that physically separates conductive elements. By placing this electrically insulating layer between dummy material portions and active memory cell stack structures, the patent ensures that no electrical current can flow between these regions, thereby maintaining electrical reliability while preserving the patterning stabilization benefits.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The electrical activity is extracted or removed from the dummy material portions through the application of dielectric isolation. This allows the dummy portions to retain their morphological function during patterning while being stripped of any potential electrical connectivity, thus resolving the contradiction between manufacturing precision improvement and electrical reliability maintenance.

Inventive Principle:

Principle #2Taking out (Extraction)

3Manufacturing precision

If external dummy materials are applied to reduce edge effects, then manufacturing precision is improved, but harmful factors increase due to iso-loading effects

Engineering Contradiction:

Improveedge effect reductionVSAvoidiso-loading effects

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent converts the potentially harmful iso-loading effects into a beneficial outcome by using dummy material portions that match the geometric and material properties of active stack structures. These dummy portions, when properly isolated, create uniform loading conditions during patterning that actually improve etch uniformity and reduce edge effects, transforming what could be a harmful non-uniformity into a beneficial uniformity.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The dummy material portions are designed with specific local qualities that match the active memory cell stack structures in terms of geometry, material composition, and spatial arrangement. This local quality matching ensures that the dummy portions create consistent loading conditions during patterning processes, thereby reducing edge array effects and improving overall manufacturing precision without introducing harmful iso-loading variations.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS9773844B2Memory cell array structures and methods of forming the same

Publication Date: 2017.09.26 MICRON TECHNOLOGY INC

AI summary

The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.