Memory Array with Embedded ROM and Pseudo Transistors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Counterfeiting of semiconductor products, particularly through cloning, poses significant revenue loss and damage to IC design companies as hackers can reverse-engineer read-only memory arrays to copy stored code, highlighting the need for a solution that prevents or hinders such cloning.
Innovation Solution
A memory array is designed with RAM cells that can operate in both RAM and ROM modes, incorporating 'pseudo' transistors that are indistinguishable from normal transistors, allowing the array to switch between modes and making it difficult for hackers to access ROM information, thereby embedding hacker-proof ROM within the memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ROM information is stored in a separate accessible memory device, then code storage is achieved, but cloning and reverse-engineering become easier
Solution Approach 1:
The patent combines ROM and RAM into a single memory array structure, where ROM key cells are interspersed among RAM cells. This merging makes it difficult for hackers to distinguish and access ROM information separately, as the ROM cells appear identical to RAM cells under microscopy, thereby preventing cloning while maintaining a unified memory architecture.
Solution Approach 2:
The patent embeds ROM functionality within the RAM memory array structure. ROM key cells are nested among regular RAM cells, with both types sharing the same physical structure and layout. This nesting approach allows ROM information to be hidden within the broader memory array, making extraction and cloning significantly more difficult.
2Adaptability or versatility
If separate ROM and RAM structures are used, then functionality is achieved, but area and power consumption increase
Solution Approach 1:
The patent creates a universal memory array that can function as both ROM and RAM depending on the operational mode. The same memory structure stores both permanent ROM information and volatile RAM data, eliminating the need for separate dedicated ROM and RAM structures. This multi-functionality reduces the overall chip area while maintaining both memory types' functionality.
3Adaptability or versatility
If separate ROM and RAM structures are used, then functionality is achieved, but power consumption increases
Solution Approach 1:
The unified memory array serves both ROM and RAM functions, allowing the system to power down unused portions. When only ROM information is needed, only the relevant key cells remain active, reducing overall power consumption compared to maintaining separate always-on ROM and RAM structures.
4Reliability
If pseudo transistors are used to create indistinguishable cells, then cloning difficulty increases, but manufacturing complexity increases
Solution Approach 1:
The patent uses pseudo transistors that are fabricated using the exact same process and structure as regular transistors, making them homogeneous and indistinguishable through standard manufacturing inspection methods. This homogeneity allows the memory cells to appear identical under microscopy, preventing hackers from identifying which cells contain ROM information, while maintaining ease of manufacture through standardized fabrication processes.
Data Source
AI summary
A memory array with RAM and embedded ROM including multiple RAM cells, a ROM cell, and a ROM enable circuit. Each RAM cell has a RAM cell structure with a first and second power terminals and configured to operate as a RAM cell when the memory array is in a RAM mode. The ROM cell has the same RAM cell structure in which at least one transistor is modified to cause the ROM cell to have a predetermined logic state. The ROM enable circuit enables bit lines of the ROM cell to control supply voltages provided to the power terminals of the RAM cells so that they settle to predetermined logic states in a ROM mode. The modified transistor has a pseudo transistor structure having a modified substrate that operates as a resistance, such as a doping region in the substrate having the same polarity type as the substrate.