Memory Array Inter-Hamming Analysis for SRAM PUF Verification

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Solution Overview

Problem

Existing physically unclonable functions (PUFs) for integrated circuits lack efficient methods to verify uniqueness and unclonability, particularly in SRAM-based PUFs, where Inter-Hamming distances (Inter-HDs) are difficult to measure accurately, affecting their reliability and security as unique identification keys.

Innovation Solution

An Inter-HD analyzer is implemented within a memory device, capable of measuring Inter-HDs by varying power supply voltage and clock frequency to obtain responses under different operating conditions, determining maximum and minimum Inter-HDs, and comparing these to ensure the PUFs' uniqueness and security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Inter-HD measurement methods are implemented for SRAM-based PUFs, then uniqueness and security verification is improved, but measurement accuracy and reliability remain difficult to achieve

Engineering Contradiction:

ImprovePUF uniqueness verificationVSAvoidInter-HD measurement accuracy

Core Design Contradiction:

ReliabilityVSMeasurement precision

Solution Approach 1:

The patent applies dynamics by varying operating conditions (voltage, temperature, frequency) during Inter-HD measurements. Multiple measurements are taken under different dynamic conditions and processed statistically to achieve accurate Inter-HD values, resolving the contradiction between reliability verification and measurement precision.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements feedback mechanisms where measurement results are continuously refined through iterative processes. Statistical processing of multiple measurements provides feedback that improves measurement accuracy, enabling reliable PUF uniqueness verification while achieving precise Inter-HD measurement.

Inventive Principle:

Principle #23Feedback

2Reliability

If multiple operating conditions are tested to measure Inter-HDs, then PUF security verification is improved, but measurement time and complexity increase

Engineering Contradiction:

ImprovePUF security verificationVSAvoidmeasurement time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by selecting a representative subset of operating conditions for measurement rather than exhaustively testing all possible conditions. Statistical processing of these partial measurements provides sufficient security verification while reducing measurement time and complexity.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent systematically varies key operating parameters (voltage, temperature, frequency) to obtain Inter-HD measurements under different conditions. By focusing on critical parameter changes and using statistical processing, the patent achieves comprehensive security verification without excessive measurement time.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10838809B2Memory array and measuring and testing methods for inter-hamming differences of memory array

Publication Date: 2020.11.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A memory device is provided. The memory device includes a memory array including a plurality of sections, and an inter-hamming difference analyzer. Each of the sections has an individual location in the memory array. The inter-hamming difference analyzer is configured to obtain a plurality of inter-hamming differences according to the number of unlike bits between content of each section of the plurality of sections corresponding to a first operating condition and content of another section of the plurality of sections corresponding to a second operating condition.