Memory Array Atomic Test and Set via Hash-Based Lock Register
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Solution Overview
Problem
The blurring distinction between memory systems and storage systems due to the increasing use of solid-state devices like FLASH memory arrays, which requires efficient management of exclusive access requests to address ranges in memory systems to minimize latency and ensure data integrity, especially in virtualized environments where multiple users share resources.
Innovation Solution
A memory system architecture that includes multiple memory modules and gateways with a communications interface, using a hash-based mechanism to manage exclusive access requests, implementing an atomic test and set function, and employing RAID groups to reduce the impact of write or erase operations on latency, with redundant components for high availability and fault tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a hash-based locking mechanism is implemented to manage exclusive access requests, then data integrity is ensured and access conflicts are resolved, but device complexity increases due to the need for hash computation and lock state management
Solution Approach 1:
A lock register acts as an intermediary data structure between multiple memory gateways and the memory modules. The hash-based locking mechanism uses this intermediate structure to coordinate access requests, where each gateway computes a hash of the target address to determine which lock bit to check/set, thereby mediating conflicts without requiring direct communication between gateways
Solution Approach 2:
The system uses a copy of the address space organization in the form of a lock register (with lock bits corresponding to address ranges) to track exclusive access states. This copying approach allows the system to manage access control efficiently by working with a simplified representation rather than the full address space itself
2Productivity
If multiple memory gateways access memory modules simultaneously, then productivity increases, but access conflicts occur requiring exclusive locking which increases loss of time
Solution Approach 1:
The address space is segmented into multiple regions, each associated with a specific lock bit in the lock register. By segmenting the address space and using hash functions to distribute access requests across different lock bits, the system allows multiple gateways to operate concurrently on different segments without conflict, thereby maintaining high productivity while minimizing wait time
Solution Approach 2:
The system changes the parameter of address representation by applying hash functions to transform physical addresses into lock bit indices. This parameter transformation allows the system to map a large address space onto a smaller number of lock bits, enabling efficient parallel access management where multiple gateways can acquire locks simultaneously on different hashed address ranges
3Reliability
If RAID groups are used to manage memory modules, then reliability improves through fault tolerance, but device complexity increases due to redundant component management
Solution Approach 1:
Memory controllers are designed with universal functionality to manage both normal and failed memory modules. When a failure is detected, the same controller that detected the failure can redirect access to redundant modules within the RAID group, eliminating the need for separate failover control logic and reducing overall system complexity despite the presence of redundant components
4Reliability
If exclusive access locking is implemented on memory addresses, then data integrity during atomic operations is ensured, but access speed decreases due to lock acquisition overhead
Solution Approach 1:
The lock register is pre-configured with lock bits corresponding to different address ranges before any access operations begin. When a memory access request arrives, the gateway immediately computes the hash and checks the corresponding lock bit without needing to allocate or initialize lock structures dynamically, thereby ensuring atomic operation integrity while minimizing access overhead
Data Source
AI summary
A system and method of managing the storage of data is described where a plurality of requesting entities can be permitted access to a shared data resource. When a modification to the data is needed, the request may be executed as an atomic operation. To do this the memory region is temporarily locked until the atomic operation is completed so that other operations related to the data are deferred until the atomic operation has completed. The lock is secured by reference to a data array or register of fixed length where the address of the locked data region is represented by a bit, the position of which is determined by computing a hash value of the address modulo the length of the lock register.