Memory Array Semiconductor Layer Encoding for Low-Cost Unique Information
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Solution Overview
Problem
Existing memory array manufacturing methods, such as mask ROM, require multiple photomasks and complex processes, leading to high costs and complexity in producing memory arrays with unique information.
Innovation Solution
A memory array design that utilizes semiconductor layers applied between electrodes to differentiate memory elements based on the presence or absence of the layer, allowing for simple and cost-effective manufacturing of arrays with unique information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If mask ROM manufacturing method is used with multiple photomasks, then unique information can be recorded in memory array, but manufacturing process becomes complex and costly
Solution Approach 1:
The invention extracts the information recording function from the photolithography process by using selective semiconductor layer formation between electrodes. Instead of using multiple photomasks to pattern memory elements, the patent forms semiconductor layers only in specific regions between electrodes through selective deposition or growth processes, thereby separating the information encoding step from the conventional photolithography steps and simplifying the overall manufacturing process.
Solution Approach 2:
The invention changes the physical state and distribution of semiconductor material by controlling layer formation parameters. By varying deposition conditions, growth rates, or selective area treatment parameters, the patent creates regions with semiconductor layers and regions without, thereby encoding information through parameter control rather than through complex photomask patterns.
2Manufacturing precision
If multiple photomasks are used for memory array manufacturing, then precise memory element formation is achieved, but manufacturing cost increases
Solution Approach 1:
The invention replaces the mechanical photomask system with a field-based or deposition-based selective formation process. Instead of physically masking areas during photolithography, the patent uses controlled semiconductor layer deposition or growth that occurs only in desired regions between electrodes, eliminating the need for multiple photomasks while maintaining precise memory element formation.
Solution Approach 2:
The invention performs preliminary formation of electrodes and insulation layers before selectively forming semiconductor layers in between. This preliminary structuring allows subsequent selective semiconductor deposition to automatically define memory element positions without requiring additional photomasks, as the electrode geometry itself guides the selective layer formation process.
Data Source
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AI summary
A memory array as a mode of the present invention has a plurality of first wires, at least one second wire crossing the first wires, and a plurality of memory elements provided in correspondence with respective intersections of the first wires and the second wire that are formed on a substrate. These memory elements can record respective pieces of information different from each other. A memory array sheet as a mode of the present invention has a plurality of memory arrays including the memory array on a sheet. Such a memory array or a memory array cut out of the memory array sheet is used for a wireless communication apparatus.