Vertical Memory Array Dielectric Barrier for Leakage Control
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Solution Overview
Problem
Conventional methods for forming vertical memory arrays in microelectronic devices lead to undesirable stresses, defects, and current leaks due to increased feature packing densities and reduced margins for formation errors, affecting memory device performance, reliability, and durability.
Innovation Solution
A microelectronic device structure with a stack of vertically alternating conductive and insulating tiers, including pillar structures and trenches filled with a dielectric material, where a liner material is used to prevent oxidation and reduce defects by forming a barrier between conductive structures and dielectric materials, thereby improving threshold voltages and reducing voids and outgassing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertical memory array architectures are used to increase memory density, then memory density is improved, but manufacturing precision deteriorates due to increased feature packing densities and reduced margins for formation errors
Solution Approach 1:
The patent segments the continuous dielectric material into discrete contact structures with defined geometries. By forming contact structures through a multi-step process involving mandrel formation, spacer deposition, and selective etching, the design breaks down the complex interconnection problem into manageable discrete elements. This segmentation allows for better control of individual contact dimensions and positions, thereby improving manufacturing precision while maintaining high memory density.
Solution Approach 2:
The patent employs preliminary action by forming sacrificial mandrels and spacers before final contact structure definition. The mandrel structures are formed first, followed by spacer deposition that precisely defines contact dimensions. This preliminary structuring establishes a framework that guides subsequent processing steps, ensuring consistent contact geometry and position even at high packing densities, thus improving manufacturing precision.
2Quantity of substance
If conventional dual deck configurations are used to enhance memory density, then memory density is improved, but reliability deteriorates due to stresses, defects, and current leaks
Solution Approach 1:
The patent introduces intermediary structures including liner materials and isolation dielectric layers between conductive elements and contact structures. These intermediary layers act as buffers that reduce stress transmission, prevent direct contact between incompatible materials, and provide pathways for stress relief. By inserting these intermediary elements, the design maintains structural integrity and electrical performance in dual-deck configurations, thereby improving reliability while preserving high memory density.
Solution Approach 2:
The patent utilizes thin film structures including liner materials and dielectric layers that provide flexible stress management. These thin films can accommodate dimensional variations and stress variations without compromising the overall device structure. The flexible nature of these thin film intermediaries allows the device to withstand manufacturing variations and operational stresses, improving reliability in high-density dual-deck configurations.
3Quantity of substance
If feature packing densities are increased to improve memory density, then memory density is improved, but manufacturing precision deteriorates due to reduced margins for formation errors
Solution Approach 1:
The patent employs preliminary action by forming sacrificial mandrels and spacers before final contact structure definition. The mandrel structures are formed first, followed by spacer deposition that precisely defines contact dimensions. This preliminary structuring establishes a framework that guides subsequent processing steps, ensuring consistent contact geometry and position even at high packing densities, thus improving manufacturing precision.
Solution Approach 2:
The patent utilizes self-aligned processes where previously formed structures serve as alignment references for subsequent steps. The spacers automatically align to mandrels, and contact structures align to spacers through self-aligned etching. This self-service alignment mechanism eliminates the need for additional lithography alignment steps, maintaining manufacturing precision even as feature packing density increases to improve memory density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces defects and enhances performance by preventing oxidation, current leakage, and void-related issues, leading to improved yield and reliability of microelectronic devices.
Implementation Method 1
a liner material is used to prevent oxidation and reduce defects by forming a barrier between conductive structures and dielectric materials
Implementation Method 2
trenches filled with a dielectric material, where a liner material is used to prevent oxidation and reduce defects by forming a barrier between conductive structures and dielectric materials
Data Source
AI summary
A method of forming a microelectronic device includes forming a microelectronic device structure. The microelectronic device structure includes a stack structure comprising insulative structures and electrically conductive structures vertically alternating with the insulative structures, pillar structures extending vertically through the stack structure, an etch stop material vertically overlaying the stack structure, and a first dielectric material vertically overlying the etch stop material. The method further includes removing portions of the first dielectric material, the etch stop material, and an upper region of the stack structure to form a trench interposed between horizontally neighboring groups of the pillar structures, forming a liner material within the trench, and substantially filling a remaining portion of the trench with a second dielectric material to form a dielectric barrier structure.