Non-Volatile Memory Array MAC Computing With Current Conversion

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Solution Overview

Problem

Current AI and machine learning systems require high-performance Multiply Accumulate (MAC) operations with low power consumption, which existing memory devices struggle to achieve efficiently due to high data movement and latency.

Innovation Solution

A memory device with a memory array and a current converting circuit that generates a source current corresponding to calculation results, converting it into an output value for use in subsequent calculations, thereby reducing power consumption and latency in MAC operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If data is moved between memory and processing units, then computation can be performed, but power consumption increases and latency increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcomputation efficiency
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent merges the memory array with the computation circuitry by directly connecting bit lines to differential sensing circuits and current converting circuits within the same memory device. This integration eliminates the need for separate data movement between memory and processing units, thereby reducing power consumption while maintaining high computation efficiency through in-memory MAC operations

Inventive Principle:
Principle #5Merging (Combining)

2Loss of time

If data is moved between memory and processing units, then computation can be performed, but latency increases

Engineering Contradiction:
ImprovelatencyVSAvoidcomputation efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

By combining memory storage and computation functions within the same device, the patent eliminates data transfer latency between separate memory and processing units. The differential sensing circuits and current converting circuits are directly integrated with the memory bit lines, enabling immediate computation on stored data without external data movement

Inventive Principle:
Principle #5Merging (Combining)

3Loss of energy

If in-memory computation is implemented, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality by designing the memory device to perform both storage and computation functions. The same memory bit lines serve dual purposes: storing data and conducting computation operations. The differential sensing circuits and current converting circuits are integrated within the memory device, enabling MAC operations without requiring separate processing units, thus reducing overall system complexity while maintaining low power consumption

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables efficient in-memory computation, reducing power consumption and latency, and allowing for large-scale computations in AI and machine learning applications by directly executing MAC operations within the memory array with minimal data movement.

Implementation Method 1

the memory cells of the memory array generate a source current corresponding to a calculation operation result

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20210375353A1Performing in-memory computing based on multiply-accumulate operations using non-volatile memory arrays
Publication Date: 2021.12.02 MACRONIX INTERNATIONAL CO LTD
  • US20210375353A1 patent drawing
  • US20210375353A1 patent drawing
  • US20210375353A1 patent drawing

AI summary

A memory device includes: a memory array including a plurality of memory cells and a plurality of bit lines; and a current converting circuit, coupled to the memory array. In executing a calculation operation, the memory cells of the memory array generate a source current corresponding to a calculation operation result. The source current is converted by the current converting circuit into an output value for being an input signal provided to a next calculation operation.