Memory Array Reference Level Generator Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional memory array circuits face challenges in reliably selecting a reference level due to systematic shifts caused by aging or temperature variations, leading to unsatisfactory data recovery, especially when extreme signal levels from faulty memory cells affect the averaging process.
Innovation Solution
A circuit that computes a reference level using a sum of functions from output signals across a row or part of a memory matrix, employing saturating functions to equalize contributions and mitigate extreme variations, with a feedback loop for precise regulation, allowing for the use of multiple data values and logic levels to ensure reliable reference selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference memory cells are used to generate reference signal by averaging output signals, then the reference level can be adapted to systematic shifts, but the device complexity increases and memory capacity is reduced
Solution Approach 1:
The patent makes ordinary memory cells serve dual purposes: storing user data and simultaneously providing output signals for reference level generation. This eliminates the need for separate reference memory cells, reducing device complexity while maintaining reliability through adaptive reference level adjustment
Solution Approach 2:
The patent dynamically adjusts the reference level parameter based on actual output signals from memory cells, allowing adaptation to systematic shifts caused by aging or temperature variations. This parameter adaptation improves data recovery reliability without requiring additional hardware
2Measurement precision
If a large number of reference cells are used to eliminate random variations, then measurement precision improves, but the quantity of memory capacity decreases
Solution Approach 1:
Ordinary memory cells perform both data storage and reference signal generation functions. By using output signals from these dual-purpose cells, the patent achieves reference level accuracy without dedicating additional cells solely to reference functions, thus preserving memory capacity
Solution Approach 2:
The memory cells themselves provide the reference signals needed for their own readout operation. The output signals from memory cells are used to compute the reference level, making the system self-sufficient and eliminating the need for separate reference cells
3Adaptability or versatility
If averaging output signals from memory cells is used to select reference level, then adaptability improves, but reliability deteriorates due to extreme signal variations from faulty cells
Solution Approach 1:
The patent extracts only the useful portion of output signals for reference level computation. By using saturating functions to equalize contributions from cells with different signal levels, the method isolates the adaptive benefit while filtering out the harmful effect of extreme variations from faulty cells
Solution Approach 2:
Saturating functions act as intermediaries between the raw output signals and the reference level computation. These functions equalize the contributions from different signal levels, preventing extreme values from faulty cells from disproportionately affecting the reference level while preserving the adaptive capability
4Reliability
If saturating functions are used to equalize contributions from output signals, then reliability improves by mitigating extreme variations, but device complexity increases
Solution Approach 1:
The patent changes the functional relationship between output signals and reference level computation by introducing saturating functions. This parameter transformation equalizes contributions from different signal levels, improving reliability while the implementation uses standard circuit elements to minimize complexity increase
Data Source
AI summary
A circuit comprises an array of memory cells (10). A plurality of sensing circuits (20), are coupled to the output (14) of respective memory cells (10), for comparing the output signal of the respective one of the memory cells (10) with a reference signal to form a data signal from the output signal from the respective one of the memory cells (10). A reference generator circuit (24, 26) forms the reference signal from a sum wherein each respective one of the memory cells (10) of the addressed group contributes a contribution that is a function of the output signal of the respective one of the memory cells (10). The contributions are equalized for output signal values at more than a saturating distance above the reference signal, and the contributions are equalized for output signal values at more than the saturating distance below the reference signal. In case of storage of multi-level data in the cells the distances from the central level to the saturation levels above and below the reference level are mutually different, with a ratio that corresponds to a ratio of the counts of cells that have been programmed to respective levels.