Memory Array Logic Using Simultaneous Row Access
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Solution Overview
Problem
The high latency and power consumption in semiconductor chips due to multiple memory accesses for Boolean operations, which are common in machine learning computations, necessitate more efficient memory operation methods.
Innovation Solution
Implementing a memory system that allows simultaneous access to multiple rows in a memory array, enabling in-memory processing of Boolean operations like NAND, NOR, and XOR by generating two indications for different rows, thereby reducing the need for separate accesses and conveying results in a single pipeline stage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If operands are read from memory and stored in registers before performing Boolean operations, then the operations can be executed using standard processing units, but the latency and power consumption increase due to multiple memory accesses
Solution Approach 1:
The patent merges the data storage function and computation function into the same memory array. Instead of separating data retrieval and processing into distinct steps (read to register, then compute), the memory array directly performs Boolean operations on stored data, combining storage and computation into a single integrated operation that reduces latency.
Solution Approach 2:
The patent introduces sense amplifiers as intermediary components that enable direct computation within the memory array. These amplifiers act as mediators between the stored data and the output, performing Boolean operations (AND, OR, NOR) on the data while it remains in the memory array, thus eliminating the need for intermediate register storage.
2Reliability
If operands are read from memory and stored in registers before performing Boolean operations, then the operations can be executed using standard processing units, but the power consumption increases due to multiple memory accesses
Solution Approach 1:
The patent merges the data storage function and computation function into the same memory array. Instead of separating data retrieval and processing into distinct steps (read to register, then compute), the memory array directly performs Boolean operations on stored data, combining storage and computation into a single integrated operation that reduces power consumption.
Solution Approach 2:
The memory array serves itself by performing computations directly on the data stored within it. The sense amplifiers enable the memory cells to actively participate in Boolean operations without requiring external processing units, allowing the memory system to service its own computational needs and reduce overall system power consumption.
3Adaptability or versatility
If multiple memory accesses are performed to retrieve operands for Boolean operations, then standard processing architectures can be used, but the computational efficiency decreases
Solution Approach 1:
The patent makes the memory array multi-functional by enabling it to perform both data storage and Boolean computation operations. The sense amplifiers are designed to support multiple logic functions (AND, OR, NOR), allowing the same memory structure to serve as both storage and processing unit, thereby improving computational efficiency while maintaining architectural versatility.
Data Source
AI summary
Systems, apparatuses, and methods for efficiently performing operations system are disclosed. A computing system uses a memory for storing data, and one or more processing units. The memory includes multiple rows for storing the data with each intersection of a row and a column being a memory bit cell. The memory processes operations. For particular operations, the two or more operands are accessed simultaneously for generating a result without being read out and stored. Two indications are generated specifying at least a first row and a second row targeted by the operation. The memory generates a result by performing the operation for each of the one or more cells in the first row a stored value with a respective stored value in the one or more cells in the second row.