3D Memory Array Conductor Tier Layout for Selective Etching

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Solution Overview

Problem

Existing memory array fabrication methods face challenges in efficiently forming vertically-stacked memory cells, particularly in the removal of lining materials from trenches without damaging underlying circuitry, leading to potential destruction of conductor material.

Innovation Solution

The use of horizontally-elongated lines of a different composition than the surrounding conductor material, combined with selective etching techniques, to form memory cells with channel material strings that are electrically coupled to the conductor tier, reducing the risk of etching damage during the removal of lining materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If selective etching techniques are used to remove lining materials from trenches, then the integrity of conductor material is improved, but the manufacturing process complexity increases

Engineering Contradiction:

Improveintegrity of conductor materialVSAvoidmanufacturing process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces horizontally-elongated lines as intermediary structures that are selectively etched away to expose and protect conductor material during the removal of lining materials. These lines act as sacrificial placeholders that guide the etching process, ensuring that conductor material is not damaged while allowing precise removal of lining materials from trenches.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The horizontally-elongated lines are formed in advance before the lining material removal process. This preliminary action establishes a protective framework that prevents damage to conductor material during subsequent etching operations, allowing the lining materials to be safely removed without risking conductor integrity.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If horizontally-elongated lines of different composition are used, then the precision of memory cell formation is improved, but the manufacturing steps increase

Engineering Contradiction:

Improveprecision of memory cell formationVSAvoidmanufacturing steps

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating horizontally-elongated lines with a composition different from the surrounding conductor material. This compositional differentiation allows selective etching of the lines while preserving the conductor material, enabling precise formation of memory cells at specific locations without affecting adjacent structures.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the compositional parameter of the horizontally-elongated lines to be different from the conductor material. This parameter change enables selective chemical etching processes to differentiate between the lines and the conductor material, achieving precise memory cell formation through controlled material removal.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the integrity of the memory array by minimizing damage to conductor material and ensuring precise formation of memory cells, thereby improving the reliability and efficiency of the fabrication process.

Implementation Method 1

selective etching techniques, to form memory cells with channel material strings that are electrically coupled to the conductor tier, reducing the risk of etching damage during the removal of lining materials

Methodology Applied

Scientific EffectSelective etching:

Implementation Method 2

conductive material is formed in the lowest first tier that directly electrically couples together the channel material of individual of the channel-material strings and the conductor material of the conductor tier

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12464718B2Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells

Publication Date: 2025.11.04 LODESTAR LICENSING GROUP LLC

AI summary

A method used in forming a memory array comprising strings of memory cells comprises forming a conductor tier comprising conductor material on a substrate. Laterally-spaced memory-block regions are formed and individually comprise a vertical stack comprising alternating first tiers and second tiers directly above the conductor tier. Channel-material strings of memory cells extend through the first tiers and the second tiers. Horizontally-elongated lines are formed in the conductor material between the laterally-spaced memory-block regions. The horizontally-elongated lines are of different composition from an upper portion of the conductor material that is laterally-between the horizontally-elongated lines. After the horizontally-elongated lines are formed, conductive material of a lowest of the first tiers is formed that directly electrically couples together the channel material of individual of the channel-material strings and the conductor material of the conductor tier, Other embodiments, including structure independent of method, are disclosed.