Memory Array Programming With Shared DAC and Sample-and-Hold
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Solution Overview
Problem
Existing memory array technologies face challenges in simultaneously achieving accurate and fast signal feeding to devices while minimizing power consumption and circuit footprint, often requiring numerous digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) for each row and column, leading to inefficiencies in programming speed and precision due to device-to-device and cycle-to-cycle variations.
Innovation Solution
The implementation of a system that uses a single DAC to provide analog signals to multiple sample and hold circuits, which store the signals as charge, allowing for accurate and efficient feeding of signals to devices in the memory array, with a configuration that measures currents of all devices in a row simultaneously and adjusts programming pulses to achieve target currents, reducing the need for extensive circuitry and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If numerous digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) are used for each row and column of memory array, then signal feeding accuracy is improved, but device complexity and circuit footprint increase
Solution Approach 1:
The patent merges multiple DAC functions into a single shared DAC that serves the entire memory array. Instead of having separate DACs for each row and column, one DAC generates analog signals that are distributed to multiple sample-and-hold circuits, dramatically reducing the number of converters needed while maintaining signal feeding accuracy through precise timing and holding mechanisms.
Solution Approach 2:
The single DAC is designed to perform multiple functions by generating analog signals for different rows and columns at different times. The sample-and-hold circuits enable this multi-functionality by capturing and holding the analog signals for subsequent use, allowing one DAC to replace what would traditionally require many dedicated converters.
2Measurement precision
If numerous digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) are used for each row and column of memory array, then signal feeding accuracy is improved, but power consumption increases
Solution Approach 1:
By merging multiple converter functions into a single DAC, the patent eliminates the power consumption associated with multiple separate converter circuits. The single DAC consumes significantly less power than numerous individual converters would require, while the sample-and-hold circuits preserve signal accuracy without requiring continuous power-intensive conversion operations.
3Manufacturing precision
If device-to-device and cycle-to-cycle variations are compensated through extensive circuitry, then programming precision is improved, but device complexity increases
Solution Approach 1:
The patent implements feedback mechanisms where the system measures actual device responses and adjusts subsequent programming operations accordingly. This feedback loop compensates for device-to-device and cycle-to-cycle variations by learning from previous operations and correcting for observed variations, achieving high programming precision without requiring complex hardware compensation circuits for each device.
Solution Approach 2:
The sample-and-hold circuits perform preliminary action by capturing and storing analog signals before they are needed for programming. This allows the system to prepare compensation data and adjust programming parameters in advance, accounting for device variations before actual programming occurs, thereby improving precision without adding complex real-time compensation circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the speed and efficiency of memory access and programming by reducing the number of converters needed, improving programming accuracy and speed, and minimizing power consumption and circuit footprint, while accommodating variations in devices within the memory array.
Implementation Method 1
a digital-to-analog converter configured to convert a digital signal to an analog signal as a voltage signal
Implementation Method 2
The sample and hold circuits may be configured to receive the analog signal and store the analog signal as a charge
Implementation Method 3
The output circuit may be configured to program the devices by comparing currents of the devices to a target current
Data Source
AI summary
The system may include a digital-to-analog converter configured to convert a digital signal to an analog signal. The system may include sample/hold circuits configured to receive and store the analog signal. The system may include an address controller configured to regulate which sample/hold circuits propagate the analog signal. The sample/hold circuits may be configured to feed the analog signal to devices of a memory array. The system may include an output circuit configured to program the devices by comparing currents of the devices to a target current. In response to one or more of the currents of the devices being within a threshold range, the output circuit may discontinue programming the corresponding devices. In response to one or more of the currents of the devices not being within the threshold range, the output circuit may continue programming the corresponding devices.