Memory Array Shift Operations via Embedded Sensing Circuitry
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Solution Overview
Problem
Existing memory systems require significant power and time to perform shift operations, as they often necessitate transferring data from memory arrays to processing resources via buses, which limits parallel processing and increases energy consumption.
Innovation Solution
The implementation of sensing circuitry within memory arrays that allows for shift operations to be performed directly on bit-vectors stored in memory cells without transferring data through I/O lines, using operations like AND, OR, SHIFT, and INVERT, enabling parallel processing and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If data is transferred from memory arrays to processing resources via buses for shift operations, then the operations can be performed using external processing resources, but the power consumption increases and processing time increases
Solution Approach 1:
The patent merges the memory array and processing resources into a single integrated structure where sensing circuitry is embedded within the memory array. This allows shift operations to be performed directly on data stored in memory cells without transferring data through external buses, thereby reducing power consumption while maintaining operational capability.
Solution Approach 2:
The memory array is designed to perform shift operations autonomously using embedded sensing circuitry. The sensing circuitry can directly manipulate data bits within the memory array through logical operations (AND, OR, SHIFT, INVERT) without requiring external processing resources, enabling the system to serve itself and reduce power consumption associated with data transfer.
2Productivity
If data is transferred from memory arrays to processing resources via buses, then shift operations can be performed, but the computational time increases
Solution Approach 1:
By merging processing capabilities directly into the memory array through embedded sensing circuitry, the patent eliminates the time required for data transfer between separate memory and processing components. Shift operations are performed in-place within the memory array, significantly reducing computational time and improving processing speed.
Solution Approach 2:
The sensing circuitry within the memory array performs shift operations autonomously without requiring data to be transferred to external processing resources. This self-service capability eliminates data transfer time and enables faster processing by keeping all operations localized within the memory structure.
3Loss of energy
If sensing circuitry is integrated within memory arrays to perform shift operations directly, then power consumption is reduced and processing efficiency is enhanced, but the device complexity increases
Solution Approach 1:
The sensing circuitry within the memory array is designed to perform multiple functions including data sensing, data manipulation through logical operations (AND, OR, SHIFT, INVERT), and shift operations. This multi-functionality reduces the need for separate dedicated circuits for each operation, thereby reducing overall device complexity while achieving energy efficiency.
Solution Approach 2:
The integrated sensing circuitry performs all necessary shift operations autonomously within the memory array without requiring external processing resources. This self-service approach consolidates multiple functions into a single integrated structure, reducing the overall system complexity while minimizing energy consumption associated with data transfer and external processing.
Data Source
AI summary
Examples of the present disclosure provide apparatuses and methods for performing shift operations in a memory. An example method comprises performing a shift operation a first element stored in a first group of memory cells coupled to a first access line and a number of sense lines of a memory array and a second element stored in a second group of memory cells coupled to a second access line and the number of sense lines of the memory array. The method can include shifting the first element by a number of bit positions defined by the second element by performing a number of AND operations, OR operations, SHIFT operations, and INVERT operations performed without transferring data via an input/output (I/O) line.