Vertical Memory Array Staircase Contacts for Dense Interconnects

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Solution Overview

Problem

Microelectronic device designers face challenges in increasing integration density and reducing fabrication complexity while maintaining performance and cost-effectiveness, particularly in vertical memory array architectures where electrical connections between conductive tiers and control logic devices are complex and costly.

Innovation Solution

The use of stadium structures with opposing staircase structures and central regions in vertical memory arrays, which facilitate efficient electrical connections through conductive contact structures, simplifying the fabrication process and enhancing integration density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If vertical memory array architecture is used to increase memory density, then integration density is improved, but electrical connection complexity increases

Engineering Contradiction:

Improvememory densityVSAvoidelectrical connection complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the electrical connection problem by introducing separate contact structures for different tiers of conductive material. Each tier has dedicated contact openings and contact structures that are independently formed and connected, dividing the complex vertical interconnection problem into manageable discrete segments that can be fabricated using standardized processes

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent uses intermediary conductive contact structures as mediators between the vertically stacked conductive material tiers and the control logic devices. These intermediary contact structures simplify the electrical connection by providing standardized interfaces that couple each tier to routing structures, reducing the direct complexity of vertical interconnections

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If staircase structures are used to form electrical connections in vertical memory arrays, then electrical connectivity is achieved, but fabrication complexity increases

Engineering Contradiction:

Improveelectrical connectivityVSAvoidfabrication complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by forming the contact structures and contact openings in predetermined locations before final assembly. The contact structures are pre-formed at specific tiers with predetermined geometries that match the staircase configuration, allowing subsequent routing and interconnection steps to proceed without complex real-time adjustments

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent creates universal contact structures that serve multiple functions: they provide electrical connection, define the staircase geometry, and serve as alignment references for subsequent routing. This multi-functionality reduces the number of separate fabrication steps needed and simplifies the overall manufacturing process

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260107461A1Microelectronic devices, memory devices, and electronic systems, and methods of forming the same

Publication Date: 2026.04.16 MICRON TECHNOLOGY INC

AI summary

A microelectronic device includes a stack structure including tiers each including insulative material and conductive material vertically adjacent the insulative material. The stack structure divided into at least two blocks separated from one another. The microelectronic device further includes at least one slot structure horizontally interposed between the at least two blocks of the stack structure. The at least one slot structure including additional insulative material and at least one contact structure extending through the additional insulative material to source tier underlying the stack structure.