3D Memory Array TAV Structure for Reliable Wordline Access

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Solution Overview

Problem

Existing memory array architectures face challenges in efficiently forming vertically-stacked memory cells with reliable electrical connections and structural integrity, particularly in the formation of through-array vias (TAVs) that ensure consistent access to wordlines.

Innovation Solution

A method involving 'gate-last' or 'replacement-gate' processing is employed to form memory arrays, utilizing a stack of alternating insulative and conductive tiers with through-array vias (TAVs) that include metal-rich refractory metal nitrides for stable electrical coupling between memory cells and peripheral circuitry, ensuring robust connections and structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional through-array via formation methods are used, then manufacturing process is simpler, but electrical connection reliability and structural integrity deteriorate

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the conductor tier with metal-rich refractory metal nitride materials before completing the through-array via formation process. This preliminary preparation of conductive materials ensures reliable electrical connections are established early in the manufacturing process, while subsequent steps complete the TAV formation without requiring complex rework or additional material deposition processes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs composite materials by using metal-rich refractory metal nitrides (such as tungsten nitride, molybdenum nitride) in the conductor tier and TAV structures. These composite material systems provide both the structural integrity needed for vertically-stacked memory cells and the electrical conductivity required for reliable wordline access, resolving the contradiction between reliability and manufacturing complexity.

Inventive Principle:
Principle #40Composite materials

2Stability of the object's composition

If vertically-stacked memory cells are formed with conventional methods, then manufacturing is easier, but structural integrity and electrical coupling stability worsen

Engineering Contradiction:
Improvestructural integrityVSAvoidmanufacturing ease
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by modifying the material composition parameters of the conductor tier to include metal-rich refractory metal nitrides with specific stoichiometric ratios. These parameter changes in material composition provide enhanced structural integrity for the vertically-stacked memory cell architecture while maintaining compatibility with existing manufacturing processes, thus improving stability without significantly increasing manufacturing difficulty.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If metal-rich refractory metal nitrides are used in TAVs, then electrical coupling stability improves, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical coupling stabilityVSAvoidmaterial deposition complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses metal-rich refractory metal nitrides as intermediary materials in the conductor tier and TAV structures. These intermediary materials serve as stable conductive pathways that facilitate reliable electrical coupling between memory cells and peripheral circuitry, while their material properties allow for deposition using standard semiconductor manufacturing techniques, thereby managing complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12525536B2Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells
Publication Date: 2026.01.13 MICRON TECHNOLOGY INC
  • US12525536B2 patent drawing
  • US12525536B2 patent drawing
  • US12525536B2 patent drawing

AI summary

A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprising channel-material strings extend through the insulative tiers and the conductive tiers. The conductor tier comprises upper conductor material directly above and directly against lower conductor material of different composition from that of the upper conductor material. A through-array-via (TAV) region is included and comprises TAVs individually comprising the upper conductor material, the lower conductor material, and a conducting material that is directly below the conductor tier. The lower conductor material is directly against the conducting material and comprises at least one of (a) and (b), where, (a): a metal-rich refractory metal nitride; and (b): a stoichiometric or non-stoichiometric refractory metal nitride directly above and directly against one of (1), (2), or (3), where: (1): an elemental metal; (2): an alloy of at least two elemental metals; and (3): a metal-rich refractory metal nitride of different composition from that of the stoichiometric or non-stoichiometric refractory metal nitride. Methods are also disclosed.