Memory Array Trench Insulative Lining for Data Retention

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Solution Overview

Problem

Current memory array fabrication methods face challenges in forming efficient and reliable strings of memory cells, particularly in vertically-stacked NAND architectures, where the integration of conductive and insulative tiers and the formation of charge-blocking regions are critical for maintaining data retention and access control.

Innovation Solution

The method involves forming a stack of alternating insulative and conductive tiers, where channel openings are etched to directly couple channel material with conductor tiers, and subsequent trench formation with insulative lining and core material to create vertically-extending strings of memory cells, including charge-blocking regions and conductive lines, optimizing the structure for improved electrical coupling and data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional memory array fabrication methods are used, then manufacturing process is simpler, but data retention and electrical coupling efficiency deteriorate

Engineering Contradiction:
Improvedata retentionVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The method forms insulative material linings in trenches before forming core materials and conductive lines. This preliminary action prevents oxide formation at critical interfaces during subsequent processing steps, ensuring reliable electrical coupling and data retention without requiring complex post-processing corrections

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulative material lining acts as an intermediary layer between the trench walls and the core material/conductive lines. This intermediary prevents direct contact that would cause oxide formation, while still allowing the structure to function as intended, thereby maintaining reliability without significantly increasing overall device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If channel material is not directly coupled with conductor tiers, then manufacturing is easier, but electrical coupling efficiency deteriorates

Engineering Contradiction:
Improvemanufacturing easeVSAvoidelectrical coupling efficiency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The method changes the physical and chemical parameters of the trench environment by lining walls with insulative material before forming conductive elements. This parameter change prevents oxide formation at the interface, ensuring direct electrical coupling between channel material and conductor tiers while maintaining manufacturing feasibility through standardized deposition processes

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If oxide formation occurs in trenches, then manufacturing is simpler, but data retention deteriorates

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoiddata retention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The method applies preliminary anti-action by forming insulative material linings in trenches before any oxide formation can occur. This preventive measure counteracts the harmful effect of oxide formation that would otherwise degrade data retention, while the lining formation uses standard semiconductor processing techniques that do not significantly complicate manufacturing

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11641742B2Memory arrays and methods used in forming a memory array comprising strings of memory cells
Publication Date: 2023.05.02 MICRON TECHNOLOGY INC
  • US11641742B2 patent drawing
  • US11641742B2 patent drawing
  • US11641742B2 patent drawing

AI summary

A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. A wall is formed in individual of the trenches laterally-between immediately-laterally-adjacent of the memory-block regions. The forming of the wall comprises lining sides of the trenches with insulative material comprising at least one of an insulative nitride and elemental-form boron. A core material is formed in the trenches to span laterally-between the at least one of the insulative nitride and the elemental-form boron. Structure independent of method is disclosed.