3D Memory Array Via Recessed Contacts
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Solution Overview
Problem
Current memory array technologies face challenges in efficiently forming vertically-stacked memory cells with direct electrical coupling and lateral isolation, which affects the performance and reliability of memory arrays, particularly in NAND architecture.
Innovation Solution
The method involves forming a stack of vertically-alternating insulative and conductive tiers with channel openings that directly couple to the conductor tier, using a conductor-material contact and conductive via to establish electrical connections, and incorporating a charge-blocking region and storage material to enhance memory cell functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If vertically-stacked memory cells are formed with direct electrical coupling, then data accessibility is improved, but manufacturing complexity increases
Solution Approach 1:
The memory array is divided into multiple tiers with alternating insulative and conductive layers. Each tier can be independently processed and formed, allowing complex 3D structures to be built through repeated simple deposition and etching cycles. This segmentation enables direct electrical coupling between vertically-stacked cells while maintaining manageable manufacturing complexity through modular fabrication.
Solution Approach 2:
The patent transitions from planar 2D memory cell arrangements to three-dimensional vertically-stacked architectures. By stacking multiple memory cell tiers vertically, direct electrical coupling is achieved through vertical wordline extensions that penetrate through insulative tiers. This dimensional change increases storage density and data accessibility while the repetitive tiered structure keeps manufacturing processes systematic.
2Reliability
If conductor-material contact and conductive via are used to establish electrical connections, then electrical coupling is improved, but device complexity increases
Solution Approach 1:
Conductor-material contacts are introduced as intermediary elements that bridge channel openings in one tier to channel openings in adjacent tiers. These contacts are formed within insulative material and provide reliable electrical pathways through the stack. The conductive via structure acts as a mediator that connects vertically-separated conductive tiers, ensuring robust electrical coupling while the systematic formation process maintains manufacturing feasibility.
3Adaptability or versatility
If charge-blocking region and storage material are incorporated, then memory cell functionality is improved, but manufacturing precision requirements increase
Solution Approach 1:
The memory cell structure employs a nested configuration where charge-blocking regions are positioned within channel openings, and storage material is deposited on specific surfaces of the channel material. This nested arrangement ensures proper spatial relationships and electrical isolation without requiring extreme manufacturing precision. The hierarchical nesting of functional regions within the vertical stack allows complex memory functionality to be achieved through controlled material deposition and patterning at each tier level.
Data Source
AI summary
A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. A channel-material string is in individual channel openings in the vertically-alternating first tiers and second tiers. A conductor-material contact is in the individual channel openings directly against the channel material of individual of the channel-material strings. The conductor-material contacts are vertically recessed in the individual channel openings. A conductive via is formed in the individual channel openings directly against the vertically-recessed conductor-material contact in that individual channel opening. Other aspects, including structure independent of method, are disclosed.