Integrated Memory Assembly Layout for Stress-Balanced Staircase Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional processing methods for forming densely-stacked conductive levels in memory devices induce stresses across the semiconductor substrate, leading to structural defects and potential device failure due to asymmetric processing and stress-induced bending.
Innovation Solution
A method is developed where a first series of slits is formed and filled symmetrically across intervening regions, followed by a second series of slits, with sacrificial material replaced by conductive material, and subsequent filling with insulative material to alleviate stresses and maintain symmetry, thereby reducing block bending and structural defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional asymmetric processing methods are used to form densely-stacked conductive levels, then manufacturing complexity is reduced, but stress-induced bending and structural defects increase
Solution Approach 1:
The patent applies asymmetry principle in reverse (achieving symmetry) by forming a first series of slits and corresponding insulative panels in a first intervening region, then forming a second series of slits and corresponding insulative panels in a second intervening region. This symmetric arrangement of slits and panels on opposite sides of the stack balances the structural distribution, counteracting stress-induced bending while maintaining manufacturing feasibility through systematic processing steps.
2Productivity
If sacrificial material is removed and conductive material is deposited to form densely-stacked conductive levels, then device functionality is improved, but stress-induced bending and structural defects occur
Solution Approach 1:
The patent applies preliminary anti-action by forming insulative panels symmetrically on opposite sides of the stack before completing the conductive level formation. These insulative panels act as preliminary counter-measures that balance the structural stress distribution, preventing stress-induced bending from occurring during subsequent conductive material deposition and processing steps.
Solution Approach 2:
The insulative panels formed in the intervening regions serve as intermediary structures that mediate between the densely-stacked conductive levels. These panels provide structural support and stress distribution, acting as a buffer that prevents direct stress transfer between adjacent conductive levels, thereby reducing stress-induced bending and structural defects.
Data Source
AI summary
Some embodiments include an integrated assembly having a memory array region, a staircase region, and an intervening region between the staircase region and the memory array region. The intervening region includes first and second slabs of insulative material extending through a stack of alternating insulative and conductive levels. Bridging regions are adjacent to the slabs. First slits are along the bridging regions, and second slits extend through the slabs. First panels are within the first slits, and second panels are within the second slits. The second panels are compositionally different from the first panels. Some embodiments include methods of forming integrated assemblies.