Non-Volatile Memory Authentication via Variable Resistance States

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Solution Overview

Problem

Current authentication systems and non-volatile memory devices lack a robust and secure data storage method, particularly in ensuring the confidentiality and integrity of encryption keys and authentication data, due to limitations in existing cipher techniques and memory technologies.

Innovation Solution

A non-volatile memory device with a memory cell array that includes memory cells with variable resistance values, where data is stored based on whether each cell is in an initial or variable state, utilizing a forming stress to change resistance values between distinct ranges, enabling secure authentication and encryption techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional non-volatile memory stores authentication data using traditional binary states, then the storage method is simple and well-established, but the security and confidentiality of encryption keys are insufficient

Engineering Contradiction:
Improvesecurity of authentication dataVSAvoidcomplexity of memory structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the resistance parameter of memory cells from traditional binary states (0 and 1) to multiple distinct resistance value ranges (first through fourth ranges). Authentication data is stored by setting memory cells to specific resistance ranges, where the initial state corresponds to one range and the variable state corresponds to another. This parameter change enables more secure authentication while maintaining a relatively simple memory cell structure based on existing variable resistance technology.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If memory cells use reversible resistance changes for data storage, then data integrity and confidentiality are improved, but the complexity of controlling and detecting resistance states increases

Engineering Contradiction:
Improvedata integrityVSAvoiddifficulty of detecting resistance states
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent introduces a control circuit that acts as an intermediary between the host and memory cells. This control circuit applies forming stresses to transition memory cells between initial and variable states, and detects the resistance values to determine authentication data. The intermediary simplifies the detection process by managing the complex resistance state transitions and providing clear authentication results to the host system.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple resistance value ranges are used to store authentication data, then the security against unauthorized access is enhanced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvesecurity against unauthorized accessVSAvoidprecision of resistance value control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent uses forming stresses that are sufficiently strong to reliably transition memory cells between resistance states. The forming stress is applied with enough magnitude and duration to ensure complete state transitions, providing a clear distinction between initial and variable states. This excessive action approach ensures robust state transitions that are tolerant of manufacturing variations, reducing the need for extremely precise control while maintaining security.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides a safer and more reliable method for storing authentication data, enhancing the security and reliability of encryption techniques by utilizing the reversible resistance changes in memory cells, thereby improving data integrity and confidentiality.

Implementation Method 1

a memory cell in a variable state, in which a resistance value reversibly changes between a plurality of changeable resistance value ranges in accordance with an electric signal applied thereto

Methodology Applied
Scientific EffectVariable resistance: Electrical Resistance

Implementation Method 2

a memory cell in an initial state which does not change to the variable state unless a forming stress for changing the memory cell in the initial state to the variable state is applied thereto

Methodology Applied
Scientific EffectResistivity change under stress: Electrical Resistance

Data Source

PatentUS9898598B2Authentication system having a non-volatile memory including memory cells in initial or variable states and a host computer for performing authentication therebetween
Publication Date: 2018.02.20 PANASONIC SEMICON SOLUTIONS CO LTD
  • US9898598B2 patent drawing
  • US9898598B2 patent drawing
  • US9898598B2 patent drawing

AI summary

An authentication system comprises a host computer; and a non-volatile memory that includes a memory cell array including a plurality of memory cells are arranged in array, the plurality of memory cells including: a memory cell in a variable state, in which a resistance value reversibly changes between a plurality of changeable resistance value ranges in accordance with an electric signal applied; and a memory cell in an initial state which does not change to the variable state unless a forming stress for changing the memory cell in the initial state to the variable state is applied thereto, a resistance value of the memory cell in the initial state being within an initial resistance value range which does not overlap with the plurality of changeable resistance value ranges, wherein in the memory cell array, data including first authentication data is stored on the basis of whether each of the plurality of memory cells is in the initial state or the variable state, wherein at least one of the host computer and the non-volatile memory stores second authentication data, and wherein at least one of the host computer and the non-volatile memory is operative to perform authentication on the basis of the first authentication data and the second authentication data.