Non-Volatile Memory Power Management via Auxiliary Circuit Segmentation

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current non-volatile memory devices face high power consumption due to the need for microprocessor control during operations like erasing, reading, and writing, especially with faster oscillation frequencies required by newer standards like SATA, which also lead to increased energy usage.

Innovation Solution

An auxiliary circuit is introduced to independently process commands, allowing the microprocessor control unit (MCU) to be dormant during certain operations, and the bus is put into power-saving mode during erasing or waiting times, reducing power consumption by pausing and resuming operations as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the serial ATA standard is used for fast transmission, then transmission speed is improved, but power consumption increases due to faster oscillation frequency

Engineering Contradiction:

Improvetransmission speedVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The bus operates in periodic cycles, alternating between active transmission mode and power-saving rest modes (partial status and slumber status). The system periodically enters rest modes during operations like erasing and waiting, achieving both fast transmission when needed and reduced power consumption during idle periods

Inventive Principle:

Principle #19Periodic action

2Ease of operation

If the MCU controls all operations of the non-volatile memory, then operational control is improved, but power consumption increases

Engineering Contradiction:

Improveoperational controlVSAvoidpower consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

The control function is segmented between the MCU and an auxiliary circuit. The auxiliary circuit independently handles specific commands and operations, allowing the MCU to enter dormant state during certain operations. This segmentation reduces power consumption while maintaining comprehensive operational control

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The auxiliary circuit autonomously processes specific commands without requiring MCU intervention. The circuit serves itself by independently managing certain memory operations, reducing the burden on the MCU and enabling power savings when the MCU remains dormant

Inventive Principle:

Principle #25Self-service

3Productivity

If the bus operates continuously at high frequency, then data transfer capability is improved, but power consumption increases

Engineering Contradiction:

Improvedata transfer capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The bus operates dynamically, adjusting its state between active high-frequency operation and power-saving rest modes based on operational requirements. The system can transition between full-speed data transfer and low-power states, optimizing both productivity and energy consumption

Inventive Principle:

Principle #15Dynamics

4Reliability

If the non-volatile memory performs erasing operations, then memory maintenance is improved, but data transfer capability deteriorates due to erasing waiting time

Engineering Contradiction:

Improvememory maintenanceVSAvoiddata transfer capability

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The auxiliary circuit proactively manages erasing operations and bus state transitions. Before erasing begins, the circuit prepares the bus for power-saving mode, ensuring memory maintenance can proceed without interrupting data transfer capability. The circuit anticipates and manages the erasing waiting period

Inventive Principle:

Principle #10Preliminary action

5Use of energy by moving object

If the bus enters rest modes during erasing or waiting, then power consumption is reduced, but communication responsiveness deteriorates

Engineering Contradiction:

Improvepower consumptionVSAvoidcommunication responsiveness

Core Design Contradiction:

Use of energy by moving objectVSEase of operation

Solution Approach 1:

The auxiliary circuit continuously monitors operational status and provides feedback to manage bus state transitions. The circuit ensures the bus enters power-saving modes only when appropriate (during erasing or waiting) and can quickly resume communication when needed, maintaining responsiveness while reducing power consumption

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS8032690B2Non-volatile memory device, and method of accessing a non-volatile memory device

Publication Date: 2011.10.04 SKYMEDI CORPORATION

AI summary

A non-volatile memory device, and a method for accessing the non-volatile memory device are provided. The non-volatile memory device is connected to a host via a bus. The non-volatile memory device comprises an MCU. By independently processing the particular commands using only the auxiliary circuit, the MCU can cease to operate, thus saving power. By setting the bus into power saving mode when the non-volatile memory device is busy, the host and the non-volatile memory device would not communicate mutually, thus, saving power.