Memory System Background Operations Scheduling

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Solution Overview

Problem

Memory system background operations in electronic devices often conflict with performance and battery life requirements, leading to noticeable impacts on device performance and battery drain when performed during active usage, necessitating a method to execute these operations without affecting user experience.

Innovation Solution

The system determines when the device is charging or in an idle mode and uses existing communication interfaces, such as the reset pin, to send pulse patterns indicating permission for background operations, allowing memory systems to perform tasks like garbage collection and cache management during low-power periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory system background operations are performed during active usage, then memory reliability and performance are improved, but device performance and battery life deteriorate

Engineering Contradiction:
Improvememory reliabilityVSAvoiddevice performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs background operations in advance during idle periods or charging times when the device is not actively being used. The memory controller monitors device state and schedules garbage collection, wear leveling, and other background tasks to execute during these predetermined low-impact periods, thereby maintaining memory reliability without affecting active device performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the timing and execution of background operations based on real-time device state monitoring. The memory controller continuously evaluates whether the device is in active usage or idle mode and adapts the scheduling of background tasks accordingly, making the operation timing flexible and responsive to actual device conditions rather than following a fixed schedule

Inventive Principle:
Principle #15Dynamics

2Reliability

If memory system background operations are performed during active usage, then memory reliability is improved, but battery life deteriorates

Engineering Contradiction:
Improvememory reliabilityVSAvoidbattery life
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system performs energy-intensive background operations in advance during charging periods when power is being replenished. The memory controller detects charging states and schedules garbage collection and wear leveling tasks to execute during these times, ensuring memory reliability is maintained while minimizing battery drain during active usage periods

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system converts the charging period, which is typically a passive state, into a beneficial opportunity to perform background operations. By detecting when the device is connected to power and scheduling tasks during this time, the system transforms a period that would otherwise be idle into productive time for maintenance operations, eliminating the trade-off between reliability and battery life

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If memory system background operations are deferred to charging times, then device performance and battery life are improved, but operation timing becomes more complex

Engineering Contradiction:
Improvedevice performanceVSAvoidoperation timing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller autonomously monitors device state (active usage, idle mode, charging status) and automatically schedules background operations without requiring host intervention or complex external coordination. This self-service capability simplifies the overall system architecture by embedding the scheduling intelligence directly in the memory controller, reducing the complexity burden on the host system

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20240168895A1Performance of memory system background operations
Publication Date: 2024.05.23 MICRON TECHNOLOGY INC
  • US20240168895A1 patent drawing
  • US20240168895A1 patent drawing
  • US20240168895A1 patent drawing

AI summary

Various examples are directed to devices and methods involving a host device and a memory system, the memory system comprising a memory controller and a plurality of memory locations. The memory system may send to the host device a first message describing background operations to be performed at the memory system. The memory system may receive from the host device a second message indicating permission to execute the background operations and may begin to execute at least one background operation.