Memory Controller Backup for Power-Loss Multi-Pass Programming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face challenges in efficiently storing multi-bit information due to power outages during multi-pass programming operations, leading to data loss and inefficiencies in data storage processes.
Innovation Solution
Implementing a multi-pass programming method with a coarse data backup function that utilizes a single-level cell programming operation to store level indicator data in a separate memory cell during power outages, ensuring data integrity and reducing resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-pass programming operation is used to store multi-bit information, then memory capacity and storage efficiency are improved, but data loss risk increases during power outages
Solution Approach 1:
The patent performs a first program operation (coarse programming) before the second program operation (fine programming) to preliminarily establish data in the memory cell. This preliminary action ensures that even if power is lost during the second operation, the data from the first operation remains intact and can be recovered, thus preventing data loss while maintaining multi-bit storage efficiency
Solution Approach 2:
The patent creates a backup copy of data by storing the same data in two different memory cells (first memory cell and second memory cell) through two separate program operations. This copying mechanism ensures that if one copy is lost or corrupted during the programming process, the other copy remains intact, thereby improving data reliability without sacrificing storage capacity
2Productivity
If multi-pass programming operation is used to store multi-bit information, then memory capacity is improved, but processing time increases during power outages
Solution Approach 1:
The patent performs coarse programming in the first program operation as a preliminary action that establishes basic data in the memory cell. This preliminary programming reduces the complexity and time required for the second fine programming operation, as the memory cell is already partially programmed. If power is lost, the system can recover from the first operation state rather than starting over, significantly reducing processing time loss
Solution Approach 2:
The patent divides the programming process into two separate program operations: first program operation (coarse programming) and second program operation (fine programming). This segmentation allows each operation to be independently managed and recovered, so that if power is lost during one operation, the other operation's progress is preserved. This reduces the total time loss compared to treating programming as a single atomic operation
Data Source
AI summary
The examples of the present disclosure provide a memory system, a memory controller, a memory and an operating method thereof, and relates to the technical field of semiconductors. The method comprises: performing a first program operation on a first memory cell to execute first data to be stored to a memory based on the first program operation and a second program operation; when a power outage occurs, generating level indicator data based on the first data, and performing a third program operation on the second memory cell to store the level indicator data. Therefore, faster data storage is realized, resources consumed by storage operation are saved, storage time is shortened, and data backup during power outage is better realized.