Nonvolatile Memory Bad Block Assignment via State Loop Count

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Solution Overview

Problem

Current nonvolatile semiconductor memory devices face challenges in detecting uncorrectable errors, leading to potential data integrity issues due to limited status detecting operations, which cannot prevent errors in memory cells programmed to multiple target states.

Innovation Solution

A storage device and method that detect the number of state pass loops for each target state during programming, generating state loop count information (SLCI) to identify successful or failed program operations, allowing for proactive bad block assignment by a storage controller based on this information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional status detecting operation is used to determine program success, then the operation is simple and fast, but it cannot detect uncorrectable errors in memory cells programmed to multiple target states

Engineering Contradiction:
Improvedata integrityVSAvoidstatus detecting operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the program operation into multiple target states (e.g., S1, S2, S3) and detects loop counts for each state separately. This segmentation allows comprehensive error detection across all target states while maintaining a systematic detection approach that doesn't overly complicate the overall operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary detection of loop counts for each target state during the program operation, before finalizing the program status. This preliminary action enables early identification of potential errors in memory cells that may not be detectable by conventional status detection, improving reliability without requiring complex post-program analysis.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If loop count detection for each target state is implemented, then uncorrectable errors can be detected early, but the detection process becomes more complex

Engineering Contradiction:
Improveerror detection capabilityVSAvoidloop count detection difficulty
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements feedback mechanisms where the detected loop count for each target state is fed back to determine the overall program status. This feedback approach systematically consolidates multiple detection results into a unified status indication, making the complex detection process manageable and interpretable without overwhelming complexity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent creates a universal detection framework using state loop count information (SLCI) that can be applied across multiple target states and different memory cell types. This multi-functional approach allows the same detection mechanism to handle various programming scenarios, reducing the need for separate complex detection circuits for each case.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If conventional bad block assignment is performed after program fail status, then the process is straightforward, but uncorrectable errors cannot be prevented

Engineering Contradiction:
Improvedata integrityVSAvoidtime for bad block assignment
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary bad block assignment by detecting loop count anomalies during the program operation itself, rather than waiting for final status detection. This preliminary action identifies and isolates problematic blocks before they can cause uncorrectable errors, preventing data integrity issues before they occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces state loop count information (SLCI) as an intermediary parameter that bridges the gap between raw loop count data and final bad block assignment decisions. This intermediary provides a comprehensive view of program status across all target states, enabling more accurate and timely bad block identification without requiring complex direct analysis of multiple loop counts.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10388395B2Storage device and bad block assigning method thereof
Publication Date: 2019.08.20 SAMSUNG ELECTRONICS CO LTD
  • US10388395B2 patent drawing
  • US10388395B2 patent drawing
  • US10388395B2 patent drawing

AI summary

A storage device includes a nonvolatile memory device that detects loop counts of state pass loops of at least one target state of a plurality of target states, and generates state loop count information (SLCI) indicative of whether a program operation is successful based on the detected loop count of the state pass loops, during a program operation of selected memory cells; and a storage controller that makes a request to the nonvolatile memory device for the state loop count information in response to detection of an operation condition or an external command, and assigns a memory block in which the selected memory cells are included as a bad block based on the state loop count information from the nonvolatile memory device.