Memory Package Ball Map Layout for Mixed NAND Chip Signal Integrity

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Solution Overview

Problem

Existing non-volatile memory packages face challenges in optimizing signal transmission performance due to the use of different capacities and sizes of non-volatile memory chips, requiring individual package ball maps for each chip, which complicates electrical connections and reduces efficiency.

Innovation Solution

The solution involves fixing the position of buffer chips connected to different non-volatile memory chips at optimized positions on the substrate, ensuring consistent electrical performance across various chip configurations through a single package ball map.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different non-volatile memory chips with different sizes and capacities are used in a single package, then the package can accommodate various chip types and capacities, but the signal transmission performance deteriorates due to non-optimal buffer chip positions

Engineering Contradiction:

Improvecompatibility with different memory chip sizes and capacitiesVSAvoidsignal transmission performance

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies local quality by fixing buffer chips at specific optimized positions on the substrate that are determined by the package ball map. Each buffer chip is placed at a predetermined location that optimizes signal transmission to its associated I/O pads, rather than allowing buffer chips to be positioned arbitrarily or uniformly across the substrate. This localized optimization at critical positions maintains signal integrity despite variations in memory chip characteristics.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent implements preliminary action by pre-determining the optimal positions for buffer chips based on the package ball map before actual chip assembly. The buffer chip positions are calculated and fixed in advance to match the I/O pad locations, ensuring that when memory chips of different sizes are installed, the buffer chips are already in the correct positions to maintain optimal signal transmission performance.

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If buffer chip positions are not fixed according to optimized positions, then manufacturing flexibility is improved, but electrical performance and signal transmission quality deteriorate

Engineering Contradiction:

Improvemanufacturing flexibilityVSAvoidelectrical performance optimization

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies universality by creating a standardized package ball map that defines fixed buffer chip positions applicable to multiple different memory chip types and capacities. This universal positioning system allows the same substrate design to work with various memory chips while maintaining optimal electrical performance, eliminating the need for custom positioning designs for each chip type.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentEP3965103B1Non-volatile memory package and storage device comprising the same

Publication Date: 2026.04.08 SAMSUNG ELECTRONICS CO LTD

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AI summary

Provided is a non-volatile memory package that is electrically optimized with a plurality of different non-volatile memory chips through a ball map, by fixing positions of buffer chips connected to the plurality of different non-volatile memory chips.