Memory Bank Array Region Segmentation for Metadata Mode

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Solution Overview

Problem

Existing memory devices struggle to efficiently support metadata mode, where normal data and corresponding metadata need to be input/output together, due to limitations in current memory architectures.

Innovation Solution

A memory device architecture that includes a bank array with distinct regions for normal data and metadata, where first metadata for first normal data is stored in a different region, and second metadata for second normal data is stored in the first region, allowing simultaneous read/write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional memory architecture is used, then device complexity is low, but productivity is poor due to inability to efficiently support metadata mode operations

Engineering Contradiction:
Improvemetadata mode operation efficiencyVSAvoidmemory architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple banks, with each bank containing a bank array further divided into first and second regions. This segmentation allows independent storage of normal data and metadata, enabling simultaneous operations and improving productivity without excessive complexity at the system level

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a nested structure where metadata is stored within the same bank array as the normal data, with the bank array containing both first and second regions. This nested arrangement allows efficient metadata mode operations while maintaining a relatively compact architecture

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If normal data and metadata are stored in the same region, then device complexity is reduced, but productivity decreases due to inability to perform simultaneous read/write operations

Engineering Contradiction:
Improvesimultaneous read/write operation capabilityVSAvoidbank array region division
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Each bank array is segmented into a first region for normal data and a second region for metadata. This segmentation enables independent read/write operations on normal data and metadata simultaneously, improving productivity while the segmented structure itself becomes the complexity that is managed through systematic design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions within the bank array are assigned different functions: the first region handles normal data operations while the second region handles metadata operations. This local differentiation of quality/function allows simultaneous operations without requiring complete architectural complexity

Inventive Principle:
Principle #3Local quality

3Ease of operation

If metadata is stored separately from normal data, then ease of operation is improved for metadata mode, but device complexity increases due to additional storage regions

Engineering Contradiction:
Improvemetadata mode operation simplicityVSAvoidstorage region configuration
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The bank array is segmented into distinct first and second regions for separate storage of normal data and metadata. This segmentation simplifies metadata mode operations by providing dedicated storage spaces, while the segmentation itself is implemented through a systematic regional division that manages complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory device architecture is designed to support both normal data operations and metadata mode operations through the same bank array structure. The multi-functional design allows the system to handle different operation types without requiring completely separate architectures, balancing ease of operation with manageable complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250078906A1Memory device and memory module including the same
Publication Date: 2025.03.06 SAMSUNG ELECTRONICS CO LTD
  • US20250078906A1 patent drawing
  • US20250078906A1 patent drawing
  • US20250078906A1 patent drawing

AI summary

A memory device includes a bank array including a plurality of memory cells, a row decoder connected to the bank array through a plurality of wordlines, and a column decoder connected to the bank array through a plurality of column select lines. The bank array may include a first region and a second region different from the first region. First metadata for first normal data stored in the first region is stored in the second region, and second metadata for second normal data stored in the second region is stored in the first region.