Memory Device Buffer Control for Current Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices face inefficiencies in current consumption due to unnecessary operation of buffers and latches when column addresses are input, as it is difficult to distinguish the timing and type of address signals, leading to wasteful energy usage.
Innovation Solution
A memory device with a buffer control unit that deactivates address buffers when the number of activated banks reaches a prescribed number, differentiating between row and column addresses to prevent unnecessary operation and reduce current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all address buffers operate continuously to ensure readiness for any address type, then the memory device can handle both row and column addresses without delay, but current consumption increases due to unnecessary operation of buffers when only column addresses are needed
Solution Approach 1:
The patent applies dynamics by making the address buffer operation state changeable based on real-time bank activation status. The buffer control unit dynamically adjusts buffer operation state (active/inactive) according to whether all banks are activated, allowing the system to transition between full operational mode and energy-saving mode, thus resolving the contradiction between continuous readiness and current consumption
Solution Approach 2:
The buffer control unit automatically determines the operation state of address buffers based on bank activation information without external intervention. The system self-regulates buffer operation by monitoring its own bank status, enabling automatic current consumption optimization while maintaining address handling capability, thus resolving the contradiction between continuous operation and energy efficiency
2Use of energy by moving object
If address buffers are deactivated to reduce current consumption, then energy efficiency improves, but the ability to quickly respond to row address inputs may be compromised
Solution Approach 1:
The system dynamically adjusts buffer activation state based on bank status: when all banks are activated, buffers are deactivated to save current; when not all banks are activated, buffers remain active for quick response. This dynamic state transition ensures both energy efficiency and fast response speed at different operational moments, resolving the contradiction between current consumption and address response speed
3Adaptability or versatility
If the memory device uses a fixed number of address buffers to handle all possible address types, then versatility is maintained, but device complexity and current consumption increase
Solution Approach 1:
The patent applies partial action by activating only the necessary number of address buffers based on current operational needs. Instead of keeping all buffers continuously active, the system activates buffers selectively according to bank activation status, performing just enough address handling capability required at each moment, thus reducing current consumption while maintaining versatility
Solution Approach 2:
The system changes the operational parameter (active/inactive state) of address buffers based on bank activation status. By varying the number of active buffers according to operational context, the system adapts its resource usage to match actual needs, resolving the contradiction between maintaining full versatility and reducing current consumption
Data Source
AI summary
A memory device includes a plurality of banks, a plurality of address buffers configured to receive addresses, and a buffer control unit configured to deactivate one or more of the plurality of address buffers when the number of activated banks among the plurality of banks is a prescribed number.