Memory Bank Command Buffering for Out-of-Order Activation
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Solution Overview
Problem
Memory systems experience latency due to the requirement of performing operations in a specific sequence and according to a specific timeline, leading to wait times for command alignment on command/address busses.
Innovation Solution
Memory banks buffer commands received out of order, storing them temporarily until the memory bank is available to perform the operations according to the intended sequence, thereby allowing commands to be executed when the bank is ready.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If commands are executed in a specific sequence according to a timeline, then operational correctness is ensured, but latency increases due to wait times for command alignment
Solution Approach 1:
The patent applies preliminary action by allowing memory banks to receive and buffer commands in advance of when they can be executed. Commands are stored in a buffer associated with the memory bank before the bank is ready to perform the operation, so that when the bank becomes available, execution can proceed immediately without waiting for command alignment on the command/address bus.
2Loss of time
If commands are buffered in memory banks, then latency is reduced by enabling out-of-order execution, but device complexity increases due to buffer implementation
Solution Approach 1:
The patent applies segmentation by associating a separate buffer with each memory bank, allowing independent command buffering and execution scheduling for each bank. This segmentation enables parallel processing of commands across multiple banks while maintaining the simplicity of individual bank-buffer pairs, rather than requiring a complex centralized buffering system.
Data Source
AI summary
Methods, systems, and devices for memory bank buffering of commands are described. Memory banks of a memory system may buffer commands that may be received out of order relative to a command sequence. For example, a memory system may receive an activate command associated with a memory bank prior to receiving a precharge command, and may store the activate command in a buffer of the memory bank. The memory system may receive the precharge command and perform a precharge operation on the memory bank. After completing the precharge operation, the memory system may access the stored activate command from the buffer of the memory bank and utilize the activate command to perform an activation operation on the memory bank. Thus, the memory system may perform commands according to the command sequence when the memory bank is available to perform them rather than waiting for specific commands to be resent.