Memory Bank Data Transfer via Internal Data Bus
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Solution Overview
Problem
Existing memory systems face inefficiencies in data transfer between banks of memory cells, leading to increased processing time and power consumption due to reliance on external data buses, which can be costly in terms of performance and energy.
Innovation Solution
Implementing an internal data bus within the memory device to facilitate direct data transfer between banks of memory cells, bypassing external data buses, and utilizing sensing circuitry to perform computations and operations without external processing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data transfer between banks uses external data buses, then device complexity is reduced, but processing time increases and power consumption increases
Solution Approach 1:
The patent merges the data transfer function between banks with the internal memory structure by implementing an internal data bus that directly connects memory banks within the same device. This eliminates the need for separate external data bus connections while enabling faster internal data transfer, thus resolving the contradiction between device complexity and processing time.
Solution Approach 2:
The patent transitions from external data bus communication (external dimension) to internal data bus communication (internal dimension). By creating a new internal communication pathway within the memory device, data transfer occurs through a different dimensional space, achieving faster transfer speeds without increasing external device complexity.
2Device complexity
If data transfer between banks uses external data buses, then device complexity is reduced, but power consumption increases
Solution Approach 1:
The patent combines the data transfer operation with internal memory operations by using an internal data bus that is already present within the memory device. This merging of functions eliminates the need for separate external communication pathways, reducing power consumption while maintaining acceptable device complexity.
Solution Approach 2:
The memory device serves itself by implementing internal data transfer capabilities through an internal data bus. The device can transfer data between its own banks without requiring external bus infrastructure, thereby reducing power consumption associated with external communications while keeping the device structure manageable.
3Device complexity
If external processing resources are used for computations, then device complexity is reduced, but processing time increases
Solution Approach 1:
The patent merges processing capabilities directly into the memory device by enabling computations to be performed on data while it resides in the memory banks. This integration of processing functions within the memory architecture eliminates the need for separate external processing resources, improving computing performance without excessively increasing device complexity.
Data Source
AI summary
The present disclosure includes apparatuses and methods to transfer data between banks of memory cells. An example includes a plurality of banks of memory cells and a controller coupled to the plurality of subarrays configured to cause transfer of data between the plurality of banks of memory cells via internal data path operations.