Memory Bank Scheduling for Refresh-Pump Error Handling

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Solution Overview

Problem

Memory devices face challenges in efficiently performing usage-based-disturbance mitigation and error handling operations without impacting the servicing of memory requests, particularly due to limited refresh-pump time intervals and shared circuitry resources.

Innovation Solution

A memory device coordinates error handling and usage-based-disturbance mitigation operations by assigning confiscated refresh-pump time intervals to perform both types of operations simultaneously in different banks, prioritizing time-sensitive functions, and utilizing control circuitry to efficiently allocate these resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory device performs usage-based-disturbance mitigation operations during refresh-pump time intervals, then data integrity is improved, but the time available for servicing memory requests is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidtime for servicing memory requests
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory device is divided into multiple banks, each capable of independent operation. Different banks can perform different operations simultaneously - some banks perform usage-based-disturbance mitigation while other banks service memory requests, thereby resolving the time conflict through spatial segmentation of functions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory device dynamically allocates refresh-pump time intervals across different banks based on operational needs. The system can adaptively decide which banks perform mitigation operations and which service requests at any given time, optimizing the balance between data integrity and request servicing

Inventive Principle:
Principle #15Dynamics

2Reliability

If the memory device performs error handling operations during refresh-pump time intervals, then data integrity is improved, but the time available for servicing memory requests is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidtime for servicing memory requests
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By segmenting the memory device into multiple banks with independent operation capabilities, the system can perform error handling in specific banks while other banks continue to service memory requests, eliminating the need to choose between error handling and request servicing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system merges error handling operations with the refresh-pump time interval framework, integrating error detection and correction into the existing refresh mechanism rather than treating them as separate, competing functions

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If the memory device performs both usage-based-disturbance mitigation and error handling operations simultaneously in different banks, then resource utilization is improved, but device complexity increases

Engineering Contradiction:
Improveresource utilizationVSAvoidcoordination of operations
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Each bank is designed with universal functionality to perform multiple operations - usage-based-disturbance mitigation, error handling, and memory request servicing - all through the same basic circuitry. This multi-functionality reduces the need for dedicated specialized circuits for each operation type

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

A control circuit acts as an intermediary that coordinates and manages the allocation of refresh-pump time intervals across different banks. This centralized coordination mechanism simplifies the complexity by providing a single point of control rather than requiring complex distributed coordination between banks

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12561198B2Foregoing a usage-based-disturbance mitigation opportunity in favor of error handling
Publication Date: 2026.02.24 MICRON TECHNOLOGY INC
  • US12561198B2 patent drawing
  • US12561198B2 patent drawing
  • US12561198B2 patent drawing

AI summary

Apparatuses and techniques for efficient handling of data errors and usage-based disturbances are described. To enable efficient utilization of time-limited resources, a memory device includes control circuitry that performs multiple different types of operations responsive to “confiscating” a refresh-pump time interval. The memory device is responsible for performing various functionalities internally while reducing the impact such functionalities may have on servicing memory requests from an external entity. Accordingly, a memory device may confiscate refresh-pump opportunities and instead perform other operations. To efficiently utilize a refresh-pump opportunity, the control circuitry can permit a bank to indicate if the bank can forgo a usage-based-disturbance mitigation opportunity. If so, the control circuitry can command the bank to perform an error-handling operation instead. The determination to forgo a usage-based-disturbance mitigation opportunity may be based on how risky a given usage-based-disturbance situation is relative to at least one mitigation threshold.