Memory Bank ID Detection for Address Interleaving Configuration

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Solution Overview

Problem

Computing systems face challenges in efficiently determining the address mapping order between memory devices and controllers, which is crucial for effective memory interleaving and operation.

Innovation Solution

A computing system that includes a memory device with unique identification data in each memory bank, a memory controller to manage access operations, and a processing unit that detects the address mapping order based on this data during the boot process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory interleaving is applied to improve access efficiency, then memory access performance is improved, but the processing unit cannot know the address mapping order without additional processes

Engineering Contradiction:
Improvememory access efficiencyVSAvoidaddress mapping configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device stores unique identification data in each memory bank, allowing the processing unit to autonomously detect the address mapping order by reading this data. This eliminates the need for complex manual configuration processes while maintaining efficient memory interleaving operations.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Unique identification data stored in memory banks serves as an intermediary element that bridges the processing unit and memory controller. This intermediary carries information about the address mapping order, enabling the processing unit to understand the interleaving configuration without requiring direct complex communication or manual setup.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If address mapping order is manually configured, then memory interleaving can be optimized, but the processing unit requires additional processes to detect the configuration

Engineering Contradiction:
Improvememory operation efficiencyVSAvoidconfiguration detection time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The address mapping order information is preliminarily stored in the memory banks as unique identification data during system setup. This preliminary action eliminates the need for time-consuming detection processes later, as the processing unit can directly read the pre-stored mapping order information when needed.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple memory banks are used for interleaving, then data access throughput is improved, but the system becomes more complex in managing address mappings

Engineering Contradiction:
Improvedata access throughputVSAvoidmemory bank management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system is segmented into multiple independent memory banks, each storing its own unique identification data. This segmentation allows the processing unit to manage address mappings for each bank independently through simple read operations, reducing the overall complexity of managing multiple banks while maintaining high throughput.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260050559A1Computing system capable of detecting interleaving configuration
Publication Date: 2026.02.19 SK HYNIX INC
  • US20260050559A1 patent drawing
  • US20260050559A1 patent drawing
  • US20260050559A1 patent drawing

AI summary

A computing system includes a memory device including a plurality of memory banks, each of the plurality of memory banks storing a plurality of unique identification data, a memory controller configured to control an access operation on the memory device, based on an address mapping order, and a processing unit coupled to the memory device through the memory controller. The processing unit is configured to detect the address mapping order, based on the plurality of unique identification data of the memory device.