Memory Bank Mode Switching for In-Memory Compute Allocation
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Solution Overview
Problem
Memory devices face challenges in efficiently allocating resources for computations, leading to decreased normal memory operation speed due to the need for vast arithmetic processing.
Innovation Solution
A memory device with a memory cell array and operation logic that includes multiple bank regions, processing elements, and control logic to dynamically adjust modes based on externally sourced setting information, enabling efficient resource allocation by switching between operation and normal modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If processing elements are allocated for computation operations, then computation capability is improved, but normal memory operation speed deteriorates
Solution Approach 1:
The memory device divides the bank regions into multiple groups (first bank region with first PE group, second bank region with second PE group) that can be independently controlled. This segmentation allows different groups to operate in different modes simultaneously, resolving the contradiction by enabling computation in one group while maintaining fast memory operations in another group.
Solution Approach 2:
The patent implements dynamic mode switching capability where the control logic can change the operational mode of different bank regions based on external setting information. Bank regions can be dynamically switched between operation mode (for computations) and normal mode (for fast memory operations), allowing the system to adapt resource allocation in real-time according to workload requirements.
Data Source
AI summary
A memory device according to an aspect may include a memory cell array including a first bank region and a second bank region each including a plurality of banks; an operation logic including one or more first processing elements (PEs) corresponding to the first bank region and one or more second PEs corresponding to the second bank region; a control logic configured to control modes of the first bank region and the second bank region based on externally sourced setting information; first and second mode signal generators configured to control enabling the first PEs, wherein the first mode signal generator is configured to output the first mode signal to enable the first PEs and the second mode signal generator is configured to output the second mode signal to disable the second PEs responsive to the first bank region being set to an operation mode and the second bank region being set to a normal mode.