Memory Bank Power Down Control via Handshake

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Solution Overview

Problem

Current memory devices consume significant power and lack efficient power management, particularly in deep power-down modes where data is erased, leading to inefficient energy usage and initialization requirements.

Innovation Solution

A memory module with multiple power down controllers and predictors that allow individual memory banks to operate in different power modes, using a handshake command to manage power states and reduce overall power consumption by selectively powering down unused banks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the entire memory device is placed in deep power-down mode to reduce power consumption, then power savings are achieved, but data is erased and initialization is required before access

Engineering Contradiction:
Improvepower consumptionVSAvoidinitialization delay
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The memory device is divided into multiple independently controllable memory banks, each with its own power down controller. This allows selective power management at the bank level rather than device-wide, enabling individual banks to enter deep power-down mode without affecting others, thus reducing power consumption while maintaining data integrity in active banks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different memory banks can operate in different power modes simultaneously based on their usage patterns. Frequently accessed banks remain in active mode with data preserved, while inactive banks enter deep power-down mode for maximum power savings. This local differentiation resolves the contradiction by applying power-saving measures only where needed.

Inventive Principle:
Principle #3Local quality

2Speed

If the entire memory device remains in active mode to maintain data accessibility, then fast access is achieved, but power consumption increases

Engineering Contradiction:
Improvememory access speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The power mode of each memory bank is dynamically adjusted based on real-time access patterns detected by power down trigger predictors. Banks transition between active and deep power-down modes as needed, optimizing the balance between access speed and power consumption. This dynamic adaptation allows the system to achieve fast access when needed while saving power during idle periods.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system periodically evaluates memory bank usage patterns and transitions banks between power modes accordingly. Power down trigger predictors monitor access patterns over time periods and initiate power-down sequences for inactive banks, creating a rhythmic pattern of active and dormant states that balances performance and energy efficiency.

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If individual memory banks are placed in deep power-down mode selectively, then power consumption is reduced, but device complexity increases due to multiple power down controllers

Engineering Contradiction:
Improvepower consumptionVSAvoidnumber of power down controllers
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

Multiple power down controllers are implemented with identical standardized functionality, each managing a specific memory bank. This uniformity allows for modular design and simplifies control logic, as each controller operates independently with the same decision-making algorithm. The predictors and controllers work together as a scalable architecture where adding more banks simply adds more identical units.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11748249B2Fine grain level memory power consumption control mechanism
Publication Date: 2023.09.05 SAMSUNG ELECTRONICS CO LTD
  • US11748249B2 patent drawing
  • US11748249B2 patent drawing
  • US11748249B2 patent drawing

AI summary

According to one general aspect, an apparatus may include a memory module. The memory module may include a plurality of memory banks configured to store data. The memory module may include a plurality of memory bank power down controllers, each configured to place one or more respective memory bank(s) in a power down mode. The memory module may include a memory module command interface configured to receive a handshake command from a memory controller, wherein the handshake command comprises a command to remove an indicated memory bank from power down mode.