Semiconductor Memory Bank Precharge Control Circuit
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Solution Overview
Problem
The increasing integration of semiconductor memory devices leads to complex data lines between cell mats, occupying a large circuit area and complicating data access, making it difficult to reduce the circuit area and minimize current consumption.
Innovation Solution
The semiconductor memory device is designed with a reduced number of precharge lines and a precharge control circuit that controls the precharge of data transfer lines, minimizing the number of precharge lines and reducing parasitic capacitance, thereby optimizing data transfer and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of precharge lines is increased to support more cell mats, then the data transfer capability is improved, but the circuit area and current consumption increase
Solution Approach 1:
The patent merges the precharge control functions for multiple data transfer lines into a single precharge control circuit. This circuit uses multiplexing to selectively connect to different precharge lines and control their precharge operations, thereby reducing the number of independent precharge control circuits and minimizing circuit area while maintaining the capability to support multiple cell mats
Solution Approach 2:
The precharge control circuit is designed with multi-functionality to perform precharge control for multiple different data transfer lines through time-multiplexed operation. The circuit can selectively activate different precharge lines based on which cell mat requires data transfer, making a single circuit serve multiple functions that would otherwise require separate dedicated circuits
2Productivity
If the number of precharge lines is increased to support more cell mats, then the data transfer capability is improved, but the current consumption increases
Solution Approach 1:
The precharge control circuit operates periodically by activating precharge lines only when needed for specific cell mat operations. Instead of maintaining continuous precharge capability on all lines simultaneously, the circuit selectively activates individual precharge lines in a time-multiplexed manner, reducing overall current consumption while maintaining data transfer capability across multiple cell mats
3Manufacturing precision
If more precharge control circuits are added to control precharge of multiple data transfer lines, then the data transfer control precision is improved, but the device complexity increases
Solution Approach 1:
The precharge control function is segmented into multiple selectable output stages within a single integrated precharge control circuit. The circuit internally divides its control capability into separate controllable paths that can be selectively activated, providing precise control for different data transfer lines without requiring separate physical control circuits for each line
Data Source
AI summary
A semiconductor memory device includes a bank, a data transfer line, a precharge control circuit, and a precharge line. The bank includes a multiplicity of cell mats arranged in a matrix form. Each of the cell mats has a plurality of unit cells. The data transfer line arranged between the cell mats transfers a data signal outputted from a selected cell mat among the cell mats. The precharge control circuit disposed on the edge of the bank controls the precharge of the data transfer line. The precharge line arranged between first and second cell mats transfers a precharge voltage to the precharge control circuit. The first and the second cell mats are disposed in the center of the bank.