Nonvolatile Memory Bank Segmentation for Read-Write Noise Isolation

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Solution Overview

Problem

In nonvolatile memory devices with multiple memory blocks, simultaneous read and rewrite operations can cause voltage fluctuations, leading to noise interference and potential malfunctions due to the proximity of write circuits and sense amplifiers, and lack of clear power source line configurations.

Innovation Solution

The solution involves separating the circuits for read and rewrite operations on the chip layout and providing distinct power source lines and ground lines for each, ensuring that the rewrite control unit and read control unit are spaced apart and supplied with different voltages to prevent voltage fluctuations from affecting the read operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the write circuit and sense amplifier are arranged close to each other to reduce chip area, then the chip area is reduced, but voltage fluctuations in the write system circuit become a noise source causing malfunctions of the read system circuit

Engineering Contradiction:
Improvechip areaVSAvoidread system circuit reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent divides the memory device into multiple banks (first bank and second bank), where each bank has its own independent write circuit and sense amplifier. This segmentation allows the write circuit of one bank to operate independently from the read operation in another bank, isolating voltage fluctuations to specific bank regions and preventing noise interference across the entire chip.

Inventive Principle:
Principle #1Segmentation

2Productivity

If simultaneous read and rewrite operations are performed in different memory blocks, then operational efficiency is improved, but voltage fluctuations from the rewrite operation become a noise source affecting the read operation

Engineering Contradiction:
Improveoperational efficiencyVSAvoidvoltage fluctuation noise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The memory device is divided into multiple banks that can operate independently and simultaneously. Each bank has dedicated power source lines and ground lines, allowing read and rewrite operations to occur in different banks without mutual interference. This segmentation enables parallel operations while isolating voltage fluctuations to specific bank regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each bank is provided with locally dedicated power source lines and ground lines, creating electrically isolated regions. This local quality approach ensures that voltage fluctuations generated during rewrite operations in one bank do not affect the read operations in other banks, as each bank has its own independent power distribution network.

Inventive Principle:
Principle #3Local quality

3Device complexity

If common power source lines are used for both read and write circuits, then circuit complexity is reduced, but voltage fluctuations during rewrite operations cause noise interference in read operations

Engineering Contradiction:
Improvepower source line configurationVSAvoidpower source noise
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The power distribution network is segmented into separate power source lines for read operations and write operations. Each bank has its own dedicated power source lines, preventing voltage fluctuations from one operation type from affecting the other. This segmentation increases power line complexity locally but eliminates global noise interference.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8094478B2Nonvolatile memory device having a plurality of memory blocks
Publication Date: 2012.01.10 INFINEON TECHNOLOGIES LLC
  • US8094478B2 patent drawing
  • US8094478B2 patent drawing
  • US8094478B2 patent drawing

AI summary

A nonvolatile memory device 1 capable of preventing interference between a read operation and a rewrite operation, and capable of preventing malfunctions that may occur in the event the read operation and the rewrite operation are performed simultaneously between memory blocks is provided. The nonvolatile memory device 1 is provided with a plurality of banks, a rewrite control unit 2 to which a first power source line VCC1 and a first ground line VSS1 are connected and which is adapted to control a rewrite operation with respect to a bank i, and a read control unit 5 to which a second power source line VCC2 and a second ground line VSS2 are connected and which is adapted to control a read operation with respect to a bank j, wherein the rewrite control unit 2 and the read control unit 5 are arranged so as to be spaced from each another.