Memory Bank Subset Control for Fine-Grained Power Saving
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Solution Overview
Problem
Existing memory instances collectively control power saving modes for all banks, leading to increased circuit area, power consumption, and performance costs when separate control is desired for different subsets of banks.
Innovation Solution
A memory instance with a control interface and bank power control circuitry allows independent power saving mode control for subsets of banks, reducing circuit area and power consumption by enabling finer-grained power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If separate control for different subsets of banks is implemented, then power savings opportunities increase, but circuit area and power consumption increase
Solution Approach 1:
The memory banks are divided into multiple subsets (first subset and second subset), each with independent power control. This segmentation allows selective placement of subsets into power saving mode based on access patterns, enabling fine-grained power management without requiring complete memory shutdown, thus reducing overall power consumption while maintaining necessary functionality.
Solution Approach 2:
The power control circuitry dynamically adjusts the power mode of different bank subsets based on real-time access detection. When no accesses are detected to a particular subset, it transitions to power saving mode; when accesses are detected, it transitions back to operational mode. This dynamic adaptation enables the system to optimize power consumption according to actual usage patterns without permanently sacrificing performance.
2Loss of energy
If separate control for different subsets of banks is implemented, then power savings opportunities increase, but device complexity increases
Solution Approach 1:
The memory system is segmented into multiple bank subsets with independent power control logic. Each subset can be independently controlled by the power control circuitry based on access detection, allowing selective power management that reduces overall power consumption without requiring complete system shutdown or complex global control mechanisms.
Solution Approach 2:
The power control circuitry automatically detects accesses to memory banks and autonomously transitions subsets between operational mode and power saving mode without requiring external intervention. This self-service mechanism simplifies the control interface while enabling intelligent power management that adapts to actual usage patterns, reducing power consumption without increasing operational complexity for the user.
3Area of stationary object
If all banks are controlled collectively in power saving mode, then circuit area is reduced, but power savings opportunities are limited
Solution Approach 1:
Instead of treating all memory banks as a single collective unit, the system segments banks into multiple subsets with independent power control. This allows the power control circuitry to place only the inactive subsets into power saving mode while keeping active subsets operational, thereby achieving greater power savings than collective control without requiring separate physical memory units for each subset.
Solution Approach 2:
Different regions (subsets) of the memory system are assigned different power states based on their local access patterns. The power control circuitry independently manages each subset, allowing some subsets to be in power saving mode while others remain operational. This local differentiation enables fine-grained power optimization without requiring uniform treatment of all banks, thus achieving better power savings with minimal additional circuit area.
Data Source
AI summary
A memory instance comprises a plurality of banks of storage cells to store data values, and input/output circuitry shared between the plurality of banks for receiving write data or outputting read data. Each bank of storage cells supports a power saving mode and an operational mode. A control interface receives power control signals for controlling use of the power saving mode. Bank power control circuitry individually controls, for each of a plurality of subsets of banks of storage cells within the same memory instance, whether that subset of banks is in the power saving mode based on the power control signals. For at least one setting for the power control signals, one subset of banks is in the power saving mode while another subset of banks in the same memory instance is in the operational mode. Also disclosed is power control circuitry which selects the power mode to use for each subset of banks and generates the power control signals.