Memory Management System with Bank Switching for Address Expansion
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Solution Overview
Problem
The limited addressable address range in microprocessor systems restricts memory size and functionality, leading to cost and resource constraints in memory expansion.
Innovation Solution
A memory management system that partitions memory into normal and switching access memory banks, with a memory management device or controller that maps data between these banks and secondary data banks, allowing for expanded addressable addresses and memory space without increasing physical address lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the number of address lines is reduced to lower cost, then the production cost is reduced, but the addressable address range is limited
Solution Approach 1:
The memory system is segmented into multiple memory banks (first memory bank, second memory bank, third memory bank) that can be independently addressed. This segmentation allows the system to expand memory capacity beyond the limited addressable range by organizing memory into discrete, manageable units that can be accessed through a reduced number of address lines.
Solution Approach 2:
The patent introduces a time dimension to memory addressing by implementing sequential access modes and bank switching mechanisms. Instead of expanding address lines spatially, the system uses temporal multiplexing to access different memory banks at different times, effectively expanding the addressable space through time-based dimensionality.
2Ease of manufacture
If the number of address lines is reduced to lower cost, then the system cost is reduced, but the memory size is limited
Solution Approach 1:
Multiple memory banks are merged into a unified memory management system controlled by a single memory management device. This merging allows the system to present a large virtual memory space to the processor while physically implementing memory using multiple smaller banks, thereby achieving large memory capacity without proportionally increasing system cost.
Solution Approach 2:
A memory management device is introduced as an intermediary between the processor and multiple memory banks. This intermediary translates logical memory addresses into physical bank addresses, enabling the system to access large memory capacities through a reduced number of address lines by mediating the address translation process.
3Quantity of substance
If memory is expanded using more address lines, then the memory size is increased, but the production cost increases
Solution Approach 1:
The memory system implements dynamic bank switching and sequential access modes that allow flexible memory expansion without permanently increasing the address bus width. The system dynamically activates different memory banks based on address patterns, enabling memory expansion while maintaining a fixed, reduced number of physical address lines.
Data Source
AI summary
The invention discloses a memory management system and a memory management method are disclosed. The memory management system includes a first memory, at least one secondary memory, and a memory management device. The first memory includes a normal access memory bank and at least one switching access memory bank. The secondary memory includes at least one secondary access memory bank corresponding to the switching access memory bank. The memory management device reads/writes the normal access memory bank or the secondary access memory bank.