Volatile Memory Bank Voting for Low-Power Retention Control

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Solution Overview

Problem

Volatile memories in electronic devices face issues with high power consumption due to frequent refresh operations, high implementation cost, and inefficient power management, particularly when accessed by multiple initiators.

Innovation Solution

A power management system that enables independent voting by multiple initiators for mode selection of volatile memory banks, using vote aggregation circuitry to generate control signals for each bank, allowing staggered power changes to reduce inrush current and improve performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are performed to maintain data in volatile memory, then data retention is improved, but power consumption increases

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic memory bank state selection where each bank can independently transition between active and retention states based on real-time demand. The vote aggregation circuitry continuously monitors requests from multiple initiators and dynamically adjusts bank states, allowing the system to optimize between data retention and power consumption in real-time rather than using fixed refresh operations.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If multiple initiators access volatile memory, then system functionality is improved, but power management complexity increases

Engineering Contradiction:
Improvemulti-initiator accessVSAvoidpower management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The vote aggregation circuitry automatically monitors requests from multiple initiators and autonomously determines optimal bank state assignments without requiring complex external power management control. Each initiator independently requests memory access, and the circuitry self-manages the voting and state selection process, simplifying the overall power management architecture while supporting multiple initiators.

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If memory banks are deactivated to reduce power consumption, then power efficiency is improved, but inrush current occurs during state changes

Engineering Contradiction:
Improvepower efficiencyVSAvoidinrush current
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent implements staggered state changes for memory banks rather than simultaneous transitions. When multiple banks need to change state, the control circuitry schedules these changes at different times, distributing the inrush current over multiple smaller current spikes. This periodic action approach maintains power efficiency benefits while reducing peak current stress on the power supply.

Inventive Principle:
Principle #19Periodic action

4Use of energy by moving object

If volatile memory is used instead of non-volatile memory, then power consumption is reduced, but data loss occurs after power disconnection

Engineering Contradiction:
Improvepower consumptionVSAvoiddata persistence
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent divides the volatile memory into multiple independent banks that can operate in different states. Banks that contain critical or frequently accessed data remain in active state with full power to ensure immediate accessibility and data integrity, while banks containing less critical data can transition to retention state to reduce power consumption. This segmentation allows the system to optimize power usage while maintaining data persistence for essential information.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12580039B2Voting-based state selection for a volatile memory
Publication Date: 2026.03.17 QUALCOMM INC
  • US12580039B2 patent drawing
  • US12580039B2 patent drawing
  • US12580039B2 patent drawing

AI summary

An apparatus includes vote aggregation circuitry configured to receive a first plurality of vote signals associated with an active memory state of a volatile memory and to generate a first vote aggregation signal based on the first plurality of vote signals. The vote aggregation circuitry is further configured to receive a second plurality of vote signals associated with a retention memory state of the volatile memory and to generate a second vote aggregation signal based on the second plurality of vote signals. The apparatus further includes memory bank control circuitry coupled to the vote aggregation circuitry and configured to provide a plurality of control signals to the volatile memory based on the first vote aggregation signal and the second vote aggregation signal. The plurality of control signals indicate, for each bank of a plurality of banks of the volatile memory, a mode associated with the bank.