3D Memory Cell Barrier Formation for Charge Transfer Isolation
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Solution Overview
Problem
The integration degree of semiconductor devices is limited by the area occupied by unit memory cells, and existing three-dimensional semiconductor devices face challenges in improving operation reliability.
Innovation Solution
A method of manufacturing a semiconductor device involves forming a stack with alternately stacked conductive and insulating layers, creating openings and slits, and forming memory layers and barrier patterns without removing the insulating layers, by partially oxidizing the memory layer through the insulating layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If memory cells are stacked in three dimensions to improve integration degree, then the area occupied by unit memory cells is reduced, but the operation reliability deteriorates due to charge transfer between stacked memory cells
Solution Approach 1:
The gate structure is segmented into multiple conductive layers and insulating layers stacked alternately, with barrier patterns formed between adjacent memory cells to segment the charge transfer path. This segmentation prevents charge transfer between stacked memory cells while maintaining high integration density.
Solution Approach 2:
Barrier patterns are introduced as intermediary structures between adjacent memory cells in the stacked configuration. These barrier patterns act as mediators that block charge transfer between memory cells while allowing the three-dimensional stacking to maintain high integration degree.
2Ease of manufacture
If insulating layers are removed to simplify manufacturing, then the manufacturing process becomes easier, but the precision of barrier pattern formation deteriorates
Solution Approach 1:
The insulating layers are retained throughout the manufacturing process as preliminary structures that guide the formation of barrier patterns. The barrier patterns are formed by partially oxidizing the memory layer through the insulating layers, using the insulating layers as templates to achieve precise barrier pattern positioning without requiring their removal.
Solution Approach 2:
The insulating layers serve as intermediary structures that enable precise barrier pattern formation. By partially oxidizing the memory layer through the insulating layers via slits, the insulating layers act as mediators that transfer the pattern information from the slit structure to the barrier patterns with high precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration degree of semiconductor devices by stacking memory cells in three dimensions and improves reliability by creating an energy barrier that prevents charge transfer between memory cells.
Implementation Method 1
forming first barrier patterns, without removing the second material layers, by partially oxidizing the memory layer through the second material layers
Data Source
AI summary
A method of manufacturing a semiconductor device may include forming a stack with alternately stacked first material layers and second material layers, forming an opening passing through the stack, forming a memory layer in the opening, forming a slit passing through the stack and exposing the first material layers and the second material layers, and forming first barrier patterns, without removing the second material layers, by partially oxidizing the memory layer through the second material layers.