Memory Module Receiver Bias Switching for Multi-Rank Bandwidth
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Solution Overview
Problem
Existing memory modules face challenges in expanding bandwidth and reducing input capacitance, particularly in multi-rank configurations where signal integrity is degraded due to heavy loading and input capacitance overlap from deactivated memory devices.
Innovation Solution
A memory module with adjustable high-pass filters and bias control, utilizing an AC Coupled Booster (ACCB) that selectively connects or disconnects filter bias terminals based on rank enablement, allowing for flexible adjustment of resistors and capacitors to manage input capacitance and expand bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple ranks are configured to increase memory capacity, then memory capacity is improved, but input capacitance overlap from deactivated memory devices increases and bandwidth is reduced
Solution Approach 1:
The patent implements dynamic control of the high-pass filter bias terminals through switching mechanisms. When a rank is deactivated, the corresponding filter bias terminal is disconnected from the bias power terminal, dynamically adjusting the filter's input capacitance. This dynamic adaptation allows the system to maintain signal integrity across multiple ranks by preventing capacitance overlap from inactive ranks, thus resolving the contradiction between increased memory capacity and maintained signal integrity.
2Reliability
If high-pass filter bias is continuously applied to all receivers, then signal processing capability is maintained, but input capacitance from deactivated receivers increases and bandwidth decreases
Solution Approach 1:
The patent employs periodic or conditional bias application to the high-pass filter terminals based on receiver activation status. Instead of continuous bias application, the system periodically or conditionally connects the filter bias terminal to the bias power terminal only when the corresponding receiver is active. This periodic action maintains signal processing capability for active receivers while preventing capacitance accumulation from deactivated receivers, thereby preserving bandwidth.
3Reliability
If filter bias terminals are always connected to bias power terminal, then amplifier performance is maintained, but input capacitance overlap increases and signal integrity degrades
Solution Approach 1:
The patent extracts or removes the bias connection from deactivated receivers by disconnecting the filter bias terminal from the bias power terminal when the corresponding rank is inactive. This extraction eliminates the harmful input capacitance overlap from deactivated receivers while maintaining the necessary bias connection for active receivers, thus preserving amplifier performance without the harmful capacitance accumulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively expands bandwidth and reduces input capacitance, enhancing signal integrity in multi-rank systems by minimizing the impact of deactivated memory devices, thus improving performance in various channel environments.
Implementation Method 1
an amplifier having a respective filter, and each amplifier is configured to selectively apply a bias filtering voltage through the respective filter
Implementation Method 2
Each of the plurality of receivers includes an amplifier amplifying differential input signals
Implementation Method 3
a filter bias terminal connected to the respective filter is selectively connected to a bias power terminal; and in a disabled receiver among the plurality of receivers, the filter bias terminal connected to the respective filter is selectively disconnected from the bias power terminal
Data Source
AI summary
A memory module includes a plurality of receivers commonly receiving signals. Each of the plurality of receivers includes an amplifier configured to apply a bias filtering voltage through a high-pass filter. In an enabled receiver among the plurality of receivers, a filter bias terminal connected to the high-pass filter is connected to a bias power terminal, and in a disabled receiver among the plurality of receivers, the filter bias terminal is not connected to the bias power terminal.