Memory Bias Current Circuit With Fast Voltage Stabilization

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Solution Overview

Problem

Existing memory chips face challenges in generating a bias current that meets high-speed requirements with stable power supply rejection capability while minimizing chip area and avoiding the need for large decoupling capacitors.

Innovation Solution

A current bias circuit comprising a voltage stabilizing circuit and a main circuit, where the voltage stabilizing circuit filters out power supply noise and stabilizes the second voltage quickly, allowing the main circuit to generate a stable bias current without the need for large decoupling capacitors, thus reducing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a voltage stabilizing circuit is designed to quickly stabilize voltage and reject power supply noise, then power supply rejection capability is improved, but circuit complexity and chip area increase

Engineering Contradiction:
Improvepower supply rejection capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The voltage stabilizing circuit is segmented into two functional parts: a clamp circuit for rapid voltage stabilization and an operational amplifier circuit for noise filtering. This segmentation allows each part to be optimized independently, achieving high power supply rejection capability while controlling overall circuit complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The clamp circuit performs preliminary voltage stabilization action before the operational amplifier circuit processes the voltage. By quickly establishing a stable voltage baseline first, the clamp circuit enables the operational amplifier to focus on noise rejection, improving overall response speed and reducing the complexity of the feedback network.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If large decoupling capacitors are used to stabilize bias current, then power supply noise filtering is improved, but chip area increases

Engineering Contradiction:
Improvebias current stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the voltage stabilization function from the traditional decoupling capacitor approach and implements it through an active voltage stabilizing circuit. This extraction replaces passive large-area capacitors with compact active circuitry, achieving equivalent or superior noise filtering without increasing chip area.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical/passive decoupling capacitor system with an active electronic voltage stabilizing circuit. The operational amplifier and clamp circuit provide dynamic voltage regulation that is more efficient than static capacitor-based decoupling, reducing the need for large decoupling capacitors and minimizing chip area.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If high-speed bias current generation is implemented, then circuit speed is improved, but power supply noise sensitivity increases

Engineering Contradiction:
Improvebias current generation speedVSAvoidpower supply noise sensitivity
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The clamp circuit performs preliminary voltage stabilization at high speed before the operational amplifier circuit processes the voltage for bias current generation. This preliminary action ensures that the voltage input to the operational amplifier is already stabilized, allowing high-speed operation without amplifying power supply noise.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The operational amplifier circuit implements feedback control to maintain stable bias current generation despite power supply noise. The feedback mechanism continuously monitors and corrects voltage variations, enabling high-speed operation while rejecting noise, thus resolving the contradiction between speed and noise sensitivity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4657436A1Current bias circuit, memory and memory system
Publication Date: 2025.12.03 YANGTZE MEMORY TECH CO LTD
  • EP4657436A1 patent drawingFigure 1~2B
  • EP4657436A1 patent drawingFigure 2C~3
  • EP4657436A1 patent drawingFigure 4~6

AI summary

Examples of the present disclosure disclose a current bias circuit, a memory and a memory system. The current bias circuit includes: a voltage stabilizing circuit configured to output a second voltage through a second terminal of the voltage stabilizing circuit based on a first voltage received by a first terminal of the voltage stabilizing circuit; and a main circuit coupled to the second terminal of the voltage stabilizing circuit at a first terminal of the main circuit, and configured to receive the second voltage output by the second terminal of the voltage stabilizing circuit to generate a bias current.