Memory Sub-System Bin Resynchronization After Power Loss

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Solution Overview

Problem

Existing memory sub-systems face increased bit error rates due to temporal voltage shift caused by slow charge loss in memory cells, which is not adequately addressed by current technologies, leading to inefficiencies and data loss during power loss and recovery.

Innovation Solution

Implementing a memory sub-system that employs block family-based error avoidance strategies, where memory cells are grouped by block families based on programming time and temperature, allowing for selective tracking and adjustment of threshold voltage offsets to maintain accurate read operations, even after power loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory cells are monitored and resynchronized after power loss, then data reliability is improved, but system complexity and recovery time increase

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory system is divided into multiple bins representing different charge loss states. Instead of monitoring all memory cells uniformly, the system segments them into bins based on their temporal voltage shift characteristics, allowing selective resynchronization of only those bins that require it after power loss.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by writing indicator data to specific bins before power loss occurs. These indicator data serve as markers that enable rapid identification of bins requiring resynchronization after power loss, eliminating the need for comprehensive post-power-loss monitoring.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If comprehensive bin resynchronization is performed after power loss, then bit error rate is reduced, but recovery time increases

Engineering Contradiction:
Improvebit error rateVSAvoidrecovery time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Indicator data are written to specific bins before power loss, creating a pre-established map of which bins contain data susceptible to charge loss. After power loss, the system only needs to resynchronize bins marked with indicator data, dramatically reducing recovery time compared to comprehensive resynchronization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses its own previously written indicator data to identify which bins require resynchronization. The indicator data essentially self-identify the bins that need attention, allowing the system to automatically determine the resynchronization scope without external intervention or comprehensive scanning.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If indicator data are written to track charge loss bins, then measurement precision is improved, but use of energy increases

Engineering Contradiction:
Improvecharge loss tracking precisionVSAvoidenergy for data writing
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

Instead of continuously monitoring all memory bins or performing exhaustive charge loss measurements, the system writes indicator data only to specific bins that are candidates for charge loss. This partial action approach achieves sufficient measurement precision for power loss recovery while minimizing the energy expenditure associated with data writing and monitoring operations.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11709775B2Write data for bin resynchronization after power loss
Publication Date: 2023.07.25 MICRON TECHNOLOGY INC
  • US11709775B2 patent drawing
  • US11709775B2 patent drawing
  • US11709775B2 patent drawing

AI summary

A system includes a memory device and a processing device, operatively coupled to the memory device, the processing device to perform operations comprising: measuring one of a temperature voltage shift or a read bit error rate of fixed data stored in the memory device in response to detecting a power on of the memory device, the fixed data having been programmed in response to detecting a power loss; estimating an amount of time for which the memory device was powered off based on results of the measuring; and in response to the amount of time satisfying a threshold criterion, updating a value for a temporal voltage shift of a block family based on the amount of time.