Memory BIST Circuitry Using Architecture-Specific Burst Patterns
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Solution Overview
Problem
Existing built-in self-test (BIST) methods for memory devices use burst patterns that are not specific to the type of memory, making it difficult to detect specific problems, damage, and defects, and often require multiple instances of BIST circuitry, increasing die sizes and resource consumption.
Innovation Solution
Implementing BIST operations using burst patterns that are specific to the architecture of the memory device, allowing for tailored detection of issues unique to each type of memory, and using a single instance of BIST circuitry to reduce resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If non-specific burst patterns are used for BIST operations, then the controller can be used with multiple types of memory, but the BIST operations are incapable of detecting particular problems associated with specific memory types
Solution Approach 1:
The system dynamically adapts the burst pattern selection based on the detected memory device type. The controller identifies the specific memory architecture and automatically selects or configures the appropriate burst pattern from a set of available patterns, making the testing system both versatile and precise without requiring multiple dedicated controllers
Solution Approach 2:
The invention changes the parameters of the burst pattern (such as sequence, length, data values) according to the specific memory device type being tested. By modifying burst pattern parameters based on memory architecture characteristics, the system achieves type-specific detection precision while maintaining a single universal controller
2Reliability
If multiple instances of BIST circuitry are used to perform BIST operations on different memory devices, then each memory device can be tested independently, but the die sizes and resource consumption increase
Solution Approach 1:
A single BIST circuit instance is designed to perform multiple functions by testing different memory devices with architecture-specific burst patterns. The universal BIST circuit can adapt to various memory types (SDRAM, DDR, DDR2, etc.) and perform independent testing on each device through software/firmware control, eliminating the need for multiple dedicated BIST circuit instances
Solution Approach 2:
Instead of duplicating hardware circuitry, the invention uses software/firmware copies of test algorithms and burst pattern data to enable independent testing of multiple memory devices. The BIST functionality is replicated through programmable instructions rather than physical hardware copies, significantly reducing die size while maintaining independent testing capability
Data Source
AI summary
Methods, systems, and devices related to built-in self-test burst patterns based on architecture of memory. A controller can be coupled to a memory device. The controller can include built-in self-test (BIST) circuitry. The BIST circuitry can include registers configured to store respective write burst patterns and read burst patterns based on an architecture of the memory device.