Memory BIST Overwrite Sequence for Secure Diagnostics

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Solution Overview

Problem

Existing memory protection methods, such as deactivating BIST circuits, hinder the ability to perform diagnostic testing during the lifetime of memory devices without risking unauthorized access to sensitive data.

Innovation Solution

A method and circuit that initiates an overwrite sequence in response to a test mode activation, allowing secure entry into memory test modes like bitmap mode, ensuring sensitive data is protected by verifying the completion of the overwrite sequence before enabling the test mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If BIST circuits are deactivated to protect sensitive data, then data security is improved, but the ability to perform diagnostic testing during memory lifetime deteriorates

Engineering Contradiction:

Improvedata securityVSAvoiddiagnostic testing capability

Core Design Contradiction:

Object-affected harmful factorsVSAdaptability or versatility

Solution Approach 1:

The BIST circuit transitions from a static deactivated state to a dynamic controllable state. The test control circuit dynamically enables the BIST circuit only when an overwrite sequence is detected, allowing the system to adapt between security mode (BIST disabled) and diagnostic mode (BIST enabled temporarily), thus resolving the contradiction between data security and diagnostic capability

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

An intermediary mechanism (test control circuit and overwrite detection logic) is introduced between the BIST circuit and the memory array. This intermediary monitors for overwrite sequences and conditionally enables the BIST circuit, preventing direct unauthorized access while allowing legitimate diagnostic testing through the intermediary's controlled activation

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If BIST circuits remain activated to enable testing, then diagnostic capability is improved, but unauthorized access to sensitive data becomes possible

Engineering Contradiction:

Improvetesting capabilityVSAvoidunauthorized data access

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The system applies preliminary anti-action by detecting the presence or absence of overwrite sequences before enabling the BIST circuit. The test control circuit proactively checks for overwrite patterns that indicate legitimate testing needs, and only then activates the BIST circuit, preventing unauthorized access while enabling legitimate diagnostics

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The system performs preliminary action by continuously monitoring for overwrite sequences and preparing to enable the BIST circuit only when such sequences are detected. This preliminary detection and conditional activation mechanism ensures testing capability is available when needed while maintaining security during normal operation

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10331530B2Data protection for memory with built-in self-test

Publication Date: 2019.06.25 STMICROELECTRONICS INT NV

AI summary

Embodiments of the circuits described include a method wherein at least one command signal is activated. The activation of the at least one command signal causes a request to a testing circuit of a memory array to enter a memory test mode. The requested memory test mode permits at least part of the memory array to be read. In response to activation of the at least one command signal, a test control circuit initiates an overwrite sequence to overwrite the data stored in the memory array. The test control circuit enables the memory test mode once the overwrite sequence has been completed.