Memory Bit Corruption Detection via Current Sensing
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Solution Overview
Problem
Integrated circuits, particularly programmable logic devices, face challenges in detecting memory bit corruption caused by single event upsets due to the delayed application of error detection techniques, which can result in operational errors for an extended duration.
Innovation Solution
The implementation of a monitored circuit, current sensing circuit, and fault detection circuit that monitors current flow through nodes in the integrated circuit to rapidly identify corrupted memory bits, using current mirrors or voltage dividers to generate fault signals based on detected current profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error detection techniques are used to compare the state of sequential elements to their original state, then memory bit corruption can be detected and corrected, but the detection cannot be applied instantaneously, allowing corrupted bits to operate for an extended duration
Solution Approach 1:
The patent implements preliminary action by continuously monitoring current flow through predetermined nodes before corruption can propagate. The current sensing circuit is positioned to detect anomalies at the moment they occur, rather than waiting for periodic comparison cycles. This allows the system to detect corruption instantaneously as it happens, eliminating the detection delay inherent in traditional periodic comparison methods.
Solution Approach 2:
The patent replaces the mechanical/computational approach of periodically comparing sequential element states with an electrical sensing approach. Instead of using logic circuits to compare states at discrete intervals, the invention uses current sensing circuits to continuously monitor electrical current flow, which naturally occurs at all times. This substitution enables instantaneous detection because electrical current monitoring is continuous rather than periodic.
2Speed
If continuous monitoring of all memory elements is implemented to enable instantaneous detection, then detection speed is improved, but device complexity and resource requirements increase significantly
Solution Approach 1:
The patent extracts only the essential detection function by monitoring current flow through specific predetermined nodes rather than monitoring all memory elements directly. The current sensing circuit is placed at strategic locations where current anomalies indicate corruption, allowing the system to detect issues in a subset of critical points rather than implementing comprehensive monitoring of every memory element. This extraction reduces complexity while maintaining effective detection capability.
Solution Approach 2:
The patent introduces an intermediary approach by using current flow as an indirect indicator of memory element corruption. Instead of directly monitoring the state of each memory element, the system monitors the current flow through predetermined nodes that are influenced by memory element states. This intermediary measurement simplifies the detection mechanism because current sensing is simpler than direct state comparison, while still providing reliable corruption detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the time needed to detect corrupted memory bits, enabling immediate correction and minimizing the duration of operational errors caused by memory bit corruption.
Implementation Method 1
When a bit of the plurality of data bits gets corrupted, a current may flow through a predetermined node in the monitored circuit. The current sensing circuit that monitors the current flow through the predetermined node in the monitored circuit may generate a current detection signal based on the monitored current flow
Data Source
AI summary
An integrated circuit may have a memory bit corruption detection circuit. The memory bit corruption detection circuit may monitor a circuit that stores multiple data bits using a current sensing circuit and a fault detection circuit. When a bit of the data bits gets corrupted, a current may flow through a predetermined node in the monitored circuit which may be sensed by the current sensing circuit. The current may have a particular current profile that may be distinguishable from current flows that occur during normal operation of the monitored circuit. The fault detection circuit may recognize the particular current profile that is indicative of a corrupted memory bit in the monitored circuit and generate a fault signal to indicate that memory bit corruption has occurred in the monitored circuit.