Nonvolatile Memory Bit Line Defect Detection via Selective String Activation
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Solution Overview
Problem
Existing nonvolatile semiconductor memory technologies face challenges in efficiently detecting bit line open defects during the manufacturing process, which affects the reliability and performance of memory cells.
Innovation Solution
A nonvolatile semiconductor memory apparatus that includes a memory cell array with stacked memory strings connected to bit lines, a row decoder, and an address buffer, which collectively selects memory strings to detect current flow and identify defects in the bit lines, enabling detailed and efficient defect detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple memory strings are selected for defect detection, then defect detection precision is improved, but device complexity increases
Solution Approach 1:
The memory cell array is divided into multiple blocks (BLK0-BLK7), each containing multiple memory strings. The row decoder selectively activates specific memory strings within selected blocks for defect detection. This segmentation allows systematic testing of different bit line segments, improving defect detection precision while managing device complexity through structured organization.
Solution Approach 2:
The row decoder dynamically selects and activates different combinations of memory strings based on detection requirements. Memory strings are selectively turned on or off during the detection process, enabling flexible testing configurations. This dynamic selection capability allows the system to adapt to different detection scenarios without requiring permanent complex circuitry for all possible string combinations.
2Measurement precision
If the length of bit lines is reduced, then defect detection precision is improved, but manufacturing precision requirements increase
Solution Approach 1:
The bit lines are effectively segmented by organizing memory strings into multiple blocks and selectively activating specific strings during detection. This creates shorter effective bit line paths for each detection operation, improving detection precision. The segmentation is achieved through the row decoder's selective string activation rather than physically shortening all bit lines, thus avoiding increased manufacturing precision requirements across the entire array.
Solution Approach 2:
Different blocks and memory strings can be tested independently with optimized detection parameters. Each selected memory string represents a local segment that can be characterized separately, allowing detection precision to be improved for each local region without requiring uniform high-precision manufacturing across the entire large-scale memory array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise detection of bit line open defects, improving the reliability of memory cell arrays by enhancing defect detection precision and reducing the length of bit lines, thereby improving overall memory performance.
Implementation Method 1
selecting a plurality of memory strings MS and detecting whether a current flows to the selected memory cells MS
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory apparatus includes a memory cell array, a row decoder, a controller. The memory cell array includes a plurality of memory strings. The memory strings include a first select transistor and a second select transistor, and are connected to each of a plurality of bit lines. The row decoder applies a voltage to the first and second select transistors. The controller detects a defect of the bit lines based on data read from the memory cells.